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f8153d492a
[docs] agent_scan.cuh architecture — scan SMEM is real, reduce SMEM is not
project_6
2026-08-05 03:33:38 +00:00
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fa8a02c642
Merge branch 'main' of https://github.com/dylanyunlon/project_6
muh-bot
2026-08-05 03:32:38 +00:00
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-
41ecb8c9e9
[analysis] 关键架构发现: gen_patch 注入目标不存在 + paged_attn V1 硬编码
muh-bot
2026-08-05 03:32:31 +00:00
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44e4f6f947
[v2] PARTITION_SIZE 512→1024 + fix import path
project_6
2026-08-05 03:32:23 +00:00
-
-
a0cddf2ddc
Merge branch 'main' of https://github.com/dylanyunlon/project_6
muh-bot
2026-08-05 03:26:40 +00:00
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-
8d26e23e8e
[muh] fix scale_reg: 补上 CCCL scale_reg_bound 的 threads SMEM cap
muh-bot
2026-08-05 03:26:36 +00:00
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33e1a21a66
[v2] Wire paged_attention_v2_pytorch into vllm — enable V2 for long sequences
project_6
2026-08-05 03:26:18 +00:00
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-
faedfab7e9
Merge branch 'main' of https://github.com/dylanyunlon/project_6
muh-bot
2026-08-05 03:22:21 +00:00
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-
23e34fde33
[muh] tuning_radix_sort: 148→211行, 基于 CCCL 2381 行源码完整重建 10-子策略架构
muh-bot
2026-08-05 03:22:17 +00:00
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3cc97c1d4e
[docs] CCCL scan architecture — lookback vs lookahead, tile_state allocation, grid sizing
project_6
2026-08-05 03:21:47 +00:00
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b50bd2dfd5
[gen_patch] fix critical struct selection: dispatch by kernel data type
muh-bot
2026-08-05 03:20:39 +00:00
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55b704c0e0
[docs] CCCL reduce architecture deep dive — SMEM model correction + V1/V2 dispatch finding
project_6
2026-08-05 03:20:51 +00:00
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-
2795d2b7f2
[muh] tuning_reduce: 修正 SMEM 模型错误 (基于 agent_reduce.cuh 源码分析)
muh-bot
2026-08-05 03:20:38 +00:00
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6bf73bdacb
[moe] BLOCK_SIZE_M heuristic refined for BI-V100 decode workload
project_6
2026-08-05 03:17:53 +00:00
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5379a573ac
[yaml+prefill] num-scheduler-steps 8→16 from CCCL delay analysis
project_6
2026-08-05 03:16:01 +00:00
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db0df78580
[gen_patch] fix 3 critical bugs: reduce struct selection, topk bits_per_pass injection, transform/batch_memcpy extraction
project_6
2026-08-05 03:15:12 +00:00
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2c43eb524f
[flash_attn] CCCL-derived autotune configs: num_stages=2 + small-tile
project_6
2026-08-05 03:09:45 +00:00
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8a87e378f8
[prefill] asymmetric BLOCK_M/BLOCK_N from CCCL AgentReduce insight
project_6
2026-08-05 03:07:14 +00:00
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8a38c04b4c
[vllm] 3 个运行时 bug 修复: SMEM 32KB→48KB, NUM_WARPS 8→4, v2 归一化
dylanyunlon
2026-08-04 12:26:24 +00:00
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11032fe95e
[muh] delay v2 完成: 全部 8 个 lookback 算法改为 no_delay
muh-bot
2026-08-04 07:18:48 +00:00
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a898faa34e
[muh] delay v2: reduce_by_key + scan_by_key 全部改为 no_delay
muh-bot
2026-08-04 07:17:34 +00:00
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31d39e6032
[muh] 首批 BI-V100 实测数据写入 3 个 tuning headers: scan/topk/transform
dylanyunlon
2026-08-04 07:13:01 +00:00
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475574fd3d
[muh] bench_triton_real + bi100_configs: REAL tunable surface benchmark
project_6
2026-08-04 06:19:07 +00:00
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5747e7c290
[docs] BI-V100 benchmark runbook: Phase 0 硬件探测 + Phase 1 quick sweep + Phase 3 端到端验证
Claude
2026-08-04 01:14:30 +00:00
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12ad7a3190
[muh] 7 headers 完整移植 CCCL tuning tables: segmented_sort 7%→29%, merge_sort 22%→43%, merge 30%→49%, adjacent_difference 38%→65%, batch_memcpy 37%→41%, find 35%→43%, find_bound 31%→44%
dylanyunlon
2026-08-03 21:36:46 +00:00
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2badbfa1b9
merge: resolve conflicts, keep full CCCL port versions
muh-bot
2026-08-03 21:35:31 +00:00
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-
c7ff12c28d
[muh] scan_by_key 14%→13%, rle_non_trivial_runs 7%→10%, rle_encode 9%→10%: 从 CCCL 3325 行源码完整移植
muh-bot
2026-08-03 21:35:16 +00:00
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6a56649d9a
[muh] radix_sort 6%→19%, rle_encode 8%→21%, rle_non_trivial_runs 6%→18%: 完整移植 CCCL SM90/SM100 tuning tables + BI-V100 SMEM 48KB 约束
dylanyunlon
2026-08-03 13:14:54 +00:00
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-
1b74226910
[muh] reduce_by_key 12%→16%: 从 CCCL 1735 行源码完整移植 66 条 SM80/SM90/SM100 tuning entries
muh-bot
2026-08-03 13:11:31 +00:00
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5923223cba
[muh] three_way_partition 7%→13%, histogram 13%→21%: 继续从 CCCL 源码移植 SM80/SM90/SM100 tuning tables
muh-bot
2026-08-03 13:02:58 +00:00
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c350c1c7e5
[muh] select_if 5%→17%, unique_by_key 3%→11%: 从 CCCL 源码完整移植 SM80/SM90/SM100 三代 tuning table
muh-bot
2026-08-03 13:01:11 +00:00
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24ef6a91b5
[CCCL] 瘦身 + 补全: 移除 cudax/python/libcudacxx-tests 冗余文件, 新增 c2h 测试助手 + cmake 构建系统 + 8 个 CUDA thrust examples
muh-bot
2026-08-03 12:39:26 +00:00
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a2a5dd8f00
feat: asymmetric BLOCK_M/BLOCK_N search + re-add BI-V100 autotune configs
Claude
2026-08-03 11:18:18 +00:00
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fe64650681
add muh/run_on_bi100.sh — single-paste diagnostic + benchmark for Phanthy Cloud
dylanyunlon
2026-08-03 10:51:20 +00:00
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327497dc17
feat(muh): add bench_triton_prefill.py — real compile-time param injection benchmark
dylanyunlon
2026-08-03 10:46:19 +00:00
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8c1955dc92
fix: revert invalid patches, add honest tuning surface assessment
dylanyunlon
2026-08-03 10:34:28 +00:00
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dc9ac0a757
feat(muh): apply CCCL-derived BI-V100 tuning to 5 vllm Python files
dylanyunlon
2026-08-03 10:27:10 +00:00
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094c710efa
feat(muh): add bench_bi100.py — CCCL BruteForceSeeker for BI-V100
dylanyunlon
2026-08-03 10:24:37 +00:00
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9f93d695a9
feat: deploy CCCL-tuned prefix_prefill + muh_dispatch + fix SM=16 count
Claude
2026-08-03 08:30:16 +00:00
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8e9c22f6c1
feat: CCCL-derived 3-tier decode dispatch + SM=16 prefill tuning + multi-step scheduling
Claude
2026-08-03 08:28:38 +00:00
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16981f221e
feat(muh): reduce_by_key 55→203 lines — full key_size×accum_size dispatch
Claude
2026-08-03 07:20:23 +00:00
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bdaec8da4b
feat(muh): select_if SM=16 tile maximization
Claude
2026-08-03 07:19:13 +00:00
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95d872e8f5
feat(muh): scan_by_key 53→284 lines — full key_size×val_size type dispatch
Claude
2026-08-03 07:18:23 +00:00
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88db0ed89c
feat(muh): SM=16 tuning overhaul — reduce/scan/transform
Claude
2026-08-03 07:16:35 +00:00
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0ba4cdb025
fix: dial back max-num-seqs 256→8, revert batched-tokens and mem-util
Claude
2026-08-03 06:51:33 +00:00
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cdc01bbc6a
fix: critical config + tuning corrections from CCCL source analysis
Claude
2026-08-03 06:45:54 +00:00
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071fa361a3
docs: CCCL → Triton methodology transfer — parameter search translation table
Claude
2026-08-03 04:37:23 +00:00
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e48a46a30d
docs: EngineX vllm injection map — Python not C++, Triton not CUDA, 32KB SMEM claim
Claude
2026-08-03 03:59:49 +00:00
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9bba7f4c79
docs: CCCL integration status — 462 assets inventory, 8/8 decode hot path coverage, no-clone-more verdict
Claude
2026-08-03 03:50:24 +00:00
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392e644611
feat: add qwen3_5.py vllm adapter for Qwen3.6-35B-A3B
Claude
2026-08-01 13:54:25 +00:00
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6beb497447
fix(hardware): SM count 50→16 confirmed on Phanthy Cloud BI-V100
root
2026-08-01 13:39:28 +00:00
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fee8f1b9e4
docs: document Qwen3.6-35B-A3B bootstrap failure and architecture analysis
Claude
2026-08-01 13:16:01 +00:00
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9b0d1c283c
docs: add competition server profile (4×BI-V100, Qwen3.6-35B-A3B)
Claude
2026-08-01 13:12:59 +00:00
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79730ea907
test: add SMEM safety validator for all 26 tuning algorithms
dylanyunlon
2026-08-01 12:37:14 +08:00
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0154a3b297
fix(tuning_batched_topk): force bits=8, fix SMEM overflow
dylanyunlon
2026-08-01 12:36:57 +08:00
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2c5e77f370
feat(gen_patch): add TUNING_REGISTRY for all 26 algorithms
dylanyunlon
2026-08-01 12:33:14 +08:00
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84c18150e6
fix(tuning_select_if): restore 3 collapsed dispatch dimensions
dylanyunlon
2026-08-01 02:26:48 +08:00
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9287700964
fix(tuning_radix_sort): remove invented portioned_smem_per_warp field
dylanyunlon
2026-08-01 02:26:46 +08:00
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2bc3263793
[muh] add tuning_radix_sort.cuh: BI-V100 tuning for radix_sort
dylanyunlon
2026-08-01 02:11:05 +08:00
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437fc3ea20
[muh] add tuning_unique_by_key.cuh: BI-V100 tuning for unique_by_key
dylanyunlon
2026-08-01 02:11:03 +08:00
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58de86d817
[muh] add tuning_select_if.cuh: BI-V100 tuning for select_if
dylanyunlon
2026-08-01 02:11:01 +08:00
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91f9a3a0e5
[muh] add tuning_scan_by_key.cuh: BI-V100 tuning for scan_by_key
dylanyunlon
2026-08-01 02:10:59 +08:00
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0ec355cf74
[muh] add tuning_reduce_by_key.cuh: BI-V100 tuning for reduce_by_key
dylanyunlon
2026-08-01 02:10:57 +08:00
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915c4aff56
[muh] add tuning_segmented_sort.cuh: BI-V100 tuning for segmented_sort
dylanyunlon
2026-08-01 02:10:55 +08:00
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561a82c849
[muh] add tuning_three_way_partition.cuh: BI-V100 tuning for three_way_partition
dylanyunlon
2026-08-01 02:10:54 +08:00
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aeb270578f
[muh] add tuning_rle_non_trivial_runs.cuh: BI-V100 tuning for rle_non_trivial_runs
dylanyunlon
2026-08-01 02:10:52 +08:00
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f3ae28bbb5
[muh] add tuning_rle_encode.cuh: BI-V100 tuning for rle_encode
dylanyunlon
2026-08-01 02:10:50 +08:00
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f838c22bad
[muh] add tuning_histogram.cuh: BI-V100 tuning for histogram
dylanyunlon
2026-08-01 02:10:48 +08:00
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3a8030224b
[muh] add tuning_segmented_radix_sort.cuh: BI-V100 tuning header for segmented_radix_sort
dylanyunlon
2026-08-01 02:08:44 +08:00
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c3e9e5b6f5
[muh] add tuning_batched_topk.cuh: BI-V100 tuning header for batched_topk
dylanyunlon
2026-08-01 02:08:42 +08:00
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0344a3fbb8
[muh] add tuning_transform_tile.cuh: BI-V100 tuning header for transform_tile
dylanyunlon
2026-08-01 02:08:40 +08:00
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3fee54f4d7
[muh] add tuning_merge_sort.cuh: BI-V100 tuning header for merge_sort
dylanyunlon
2026-08-01 02:08:38 +08:00
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af8fc0caeb
[muh] add tuning_merge.cuh: BI-V100 tuning header for merge
dylanyunlon
2026-08-01 02:08:37 +08:00
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c0bfc8c93d
[muh] add tuning_segmented_scan.cuh: BI-V100 tuning header for segmented_scan
dylanyunlon
2026-08-01 02:08:35 +08:00
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105dd96b52
[muh] add tuning_segmented_reduce.cuh: BI-V100 tuning header for segmented_reduce
dylanyunlon
2026-08-01 02:08:33 +08:00
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81e4a907c0
[muh] add tuning_find_bound_sorted_values.cuh: BI-V100 tuning header for find_bound_sorted_values
dylanyunlon
2026-08-01 02:08:31 +08:00
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25f7a636a9
[muh] add tuning_find.cuh: BI-V100 tuning header for find
dylanyunlon
2026-08-01 02:08:29 +08:00
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eaca73a390
[muh] add tuning_adjacent_difference.cuh: BI-V100 tuning header for adjacent_difference
dylanyunlon
2026-08-01 02:08:28 +08:00
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52c5ca7ce5
refactor(muh_dispatch): read-once from C++ headers, not write-twice
dylanyunlon
2026-08-01 01:30:42 +08:00
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482aabdea3
fix(muh_kernel_map): add threads >= 32 floor in Python scale_mem_bound
dylanyunlon
2026-08-01 01:29:57 +08:00
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142568072a
fix(common.cuh): add threads >= 32 floor in scale_mem_bound
dylanyunlon
2026-08-01 01:29:47 +08:00
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03f6a59ebf
fix(muh_dispatch): add verify_against_headers() to close the loop
dylanyunlon
2026-08-01 00:32:16 +08:00
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3a2b67c166
fix(tuning_reduce): auto [t,i] → auto [i,t] matching CCCL scaling_result
dylanyunlon
2026-08-01 00:31:41 +08:00
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ec1c85cd9a
fix(common.cuh): scale_mem_bound — 3 bugs vs CCCL original
dylanyunlon
2026-08-01 00:31:22 +08:00
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3ebc37d80d
[muh] fix scale_mem_bound: 3 bugs vs CCCL util_arch.cuh
dylanyunlon
2026-08-01 00:00:02 +08:00
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173c6afe09
[muh] kernel_map: full vllm→CCCL mapping with SMEM overflow detection
Claude
2026-07-31 11:13:33 +00:00
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e69c46d0b7
[muh] add muh_dispatch.py — CCCL-style type-dispatched kernel config for BI-V100
dylanyunlon
2026-07-31 19:11:46 +08:00
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d14b0c19e4
[docs] add CCCL SM100 vs muh BI-V100 specialization parity analysis
dylanyunlon
2026-07-31 18:35:50 +08:00
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35ef79c5f8
[muh] scan: add bi100_lookback_1B_o8 — close SM100 parity gap (7/7 lookback branches)
dylanyunlon
2026-07-31 18:35:01 +08:00
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c5a0d61851
sync: align with enginex-vllm-bi100-qwen36 baseline (1902c81f)
Claude
2026-07-31 09:43:58 +00:00
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de7ee4383e
[VERIFIED] Hardware-tested native kernel integration
Claude
2026-07-31 06:43:25 +00:00
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78a0ebd516
[CRITICAL] Fix V2 cache layout: V1=5D K, V2=4D K with transposed layout
Claude
2026-07-31 06:33:06 +00:00
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4867d4f780
[CRITICAL] Enable ixformer native V1/V2 paged attention kernels
Claude
2026-07-31 06:18:32 +00:00
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39e32343eb
[ARCH] CCCL-derived paged attention kernel architecture + Triton rewrite
Claude
2026-07-31 04:13:07 +00:00
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2316199c97
[FIX] V2 shape mismatch bug — v_padded used num_heads for kv_h tensor
Claude
2026-07-31 03:52:23 +00:00
-
cd0d9e1a91
[OPT] Fix online softmax bug in Triton V2 Phase 1
Claude
2026-07-30 16:16:56 +00:00
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d9bbef54d8
[OPT] Complete GQA broadcast — V weighted sum also avoids expansion
Claude
2026-07-30 16:15:34 +00:00
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8951d74936
[OPT] Raise max-seq-len-to-capture to 65536 for more CUDA graph coverage
dylanyunlon
2026-07-30 16:14:57 +00:00
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0c60ed8784
[OPT] GQA broadcast in V2 — eliminate 1GB/step memory allocation
Claude
2026-07-30 16:13:54 +00:00
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7ad59e781f
[OPT] MoE prefill: sorted-token grouped GEMM (contiguous per-expert access)
dylanyunlon
2026-07-30 16:12:38 +00:00