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  • 33f6ead1b8 [OPT] Complete Triton V2 Phase 1 — paged K/V gather from prefix_prefill.py pattern Claude 2026-07-30 16:07:09 +00:00
  • ef6abf3dc7 [DEPLOY] Complete submission: baseline + all optimizations dylanyunlon 2026-07-30 16:06:20 +00:00
  • 3722503dee [OPT] Optimized paged_attn.py: pre-gather context KV + V2 heuristic + Triton fallback dylanyunlon 2026-07-30 16:05:04 +00:00
  • 6d8de852ad [OPT] head_dim=256 Triton support — BLOCK=32 for Qwen3.6 Claude 2026-07-30 16:05:01 +00:00
  • a53d1a28b0 [OPT] Triton paged_attention_v2 kernel skeleton — Phase 2 reduction complete Claude 2026-07-30 15:59:12 +00:00
  • cbe6066257 [OPT] V2 single-bmm: 195 kernel launches → 3 (CCCL transform_reduce pattern) dylanyunlon 2026-07-30 15:58:26 +00:00
  • 15ef28e863 [OPT] Vectorize paged_attention_v2 — eliminate block-gather for-loop dylanyunlon 2026-07-30 15:44:46 +00:00
  • 638858a317 [OPT] Enable Triton prefill + raise decode threshold — the actual performance work dylanyunlon 2026-07-30 15:41:01 +00:00
  • 9cb7f9d037 [OPT] PagedAttention V2 implementation — fill the NotImplementedError hole Claude 2026-07-30 15:40:14 +00:00
  • 4463e9ccee [OPT] BI-V100 Triton kernel tuning + computility-run.yaml optimization Claude 2026-07-30 15:33:44 +00:00
  • c6e298831f update baseline dylanyunlong 2026-07-30 15:19:37 +00:00
  • 4c796fe4b3 [MUH] Derive BI-V100 tuning values from hardware specs — fix 5 SMEM overflow bugs Claude 2026-07-30 15:08:30 +00:00
  • c7a63bc2c8 [MUH] Fix 7 structural discrepancies vs CCCL — read source, not grep Claude 2026-07-30 14:37:38 +00:00
  • e02134a3ce [MUH] Delete 20 dead-code batch-generated tuning headers dylanyunlon 2026-07-30 14:22:18 +00:00
  • 07b015f31e [MUH] Complete all 26 CCCL algorithm tuning headers — full parity with cub/device/dispatch/tuning/ Claude 2026-07-30 14:19:51 +00:00
  • 57e222b99d [MUH] Fix three-layer disconnect — C++ headers are now the single source of truth dylanyunlon 2026-07-30 14:12:33 +00:00
  • 5f880bb279 [MUH] Add C++/CUDA tuning headers — the real muh, not Python wrappers dylanyunlon 2026-07-30 14:01:07 +00:00
  • 9b21a13119 [MUH] Bootstrap muh toolchain — extract/parse/gen_yaml/gen_patch + baseline.muh dylanyunlon 2026-07-30 10:39:06 +00:00
  • 70e80c5810 [DOC] Append CCCL tuning analysis to checkpoint — all 27 files consumed as model input EngineX CI 2026-07-30 10:30:36 +00:00
  • e7fdf5777a [DOC] Add MUH project checkpoint — single source of truth for context continuity EngineX CI 2026-07-30 09:59:15 +00:00
  • 56fd68e7dd [INFRA] Import NVIDIA/CCCL upstream as optimization reference library EngineX CI 2026-07-30 09:35:51 +00:00
  • b4d01f481e Initial commit dylanyunlon 2026-07-30 17:03:23 +08:00