claude ec140f3605 docs: complete porting assessment — 5 repos, 2660 build targets, ivcore10 compatibility
cat'd every source:
  - CCCL c/parallel/src/reduce.cu: NVRTC JIT (cannot port directly)
  - CCCL c/parallel.v2/src/reduce.cu: hostjit/libnvcc (cannot port directly)
  - CUB block/warp headers: pure header-only (CAN compile with corex)
  - CUTLASS SM70 SIMT GEMM: CAN port (example 24 grouped_gemm)
  - FlashAttention: SM80 Tensor Core (cannot port), but layer_norm is SIMT
  - FLA: pure Triton (needs corex Triton verification)
  - xllm ILU: all already ported

Key finding: CCCL c/parallel depends on nvrtc JIT — must bypass with AOT compilation
using CUB header-only API + corex clang --cuda-gpu-arch=ivcore10
2026-08-14 08:17:25 +00:00
2026-08-07 08:43:51 +00:00
2026-07-30 17:03:23 +08:00
2026-08-13 02:29:40 +00:00

project_6

Description
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Readme 427 MiB
Languages
C++ 41.8%
Cuda 31.6%
Python 22.2%
C 2.1%
CMake 1.1%
Other 1.1%