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dylanyunlon 9605415404 test: add reduce tuning verification against CCCL ground truth

Tests scale_mem_bound CCCL parity (8/8), register pressure for all
14 bi100_* structs, summary_statistics.cu 28-byte AccumT safety,
and vectorization alignment. All pass.

Key finding: BI-V100 float32 tile is 1.5x SM100's (12288 vs 8192)
because 16 SMs need larger tiles to compensate for fewer CTAs.
float64 tile is 0.6x SM100's (6144 vs 10240) because threads=640
was reduced to 384 (clean warp count) and vec=2 added.

2026-08-07 03:13:24 +00:00

feat(cccl): integrate missing CCCL directories — python/, ci/, .agent/, docs/, test/

2026-08-07 02:34:33 +00:00

[docs] CCCL ↔ EngineX architecture alignment — from reading 3792 CCCL source files

2026-08-06 06:02:40 +00:00

test: add reduce tuning verification against CCCL ground truth

2026-08-07 03:13:24 +00:00

fix: critical config + tuning corrections from CCCL source analysis

2026-08-03 06:45:54 +00:00

qwen3_6_scripts

fix(critical): v2 kernel softmax normalization was commented out — outputs were wrong

2026-08-07 02:46:46 +00:00

feat(engine): CCCL system design integration into prefill + decode hot paths

2026-08-07 02:42:08 +00:00

feat: add qwen3_5.py vllm adapter for Qwen3.6-35B-A3B

2026-08-01 13:54:33 +00:00

__init__.py

[DEPLOY] Complete submission: baseline + all optimizations

2026-07-30 16:06:20 +00:00

.gitignore

[muh] gen_patch: expand VLLM_INJECTION_POINTS to full real injection surface

2026-08-06 04:01:40 +00:00

attention.py

[ENGINE] attention.py: CCCL dispatch_reduce.cuh single-tile decision for V1/V2

2026-08-07 01:54:40 +00:00

baseline.muh

[critical/config] baseline.muh: sync from computility-run.yaml — was stale

2026-08-06 06:12:51 +00:00

BI_V100_BENCHMARK_RUNBOOK.md

[docs] BI-V100 benchmark runbook: Phase 0 硬件探测 + Phase 1 quick sweep + Phase 3 端到端验证

2026-08-04 01:14:30 +00:00

CCCL_ASSET_MAP.md

[CCCL] Add missing CCCL components: c2h, nvbench_helper, cmake, cudax, AGENTS.md

2026-08-06 02:14:18 +00:00

CCCL_INTEGRATION_STATUS.md

docs: CCCL integration status — 462 assets inventory, 8/8 decode hot path coverage, no-clone-more verdict

2026-08-03 03:50:24 +00:00

CCCL_MUH_GAP_ANALYSIS.md

analysis: 26-algorithm CCCL↔muh full gap scan — 19.7% coverage, 299 benchmark points needed, 3/26 READY

2026-08-07 02:43:04 +00:00

CCCL_TUNING_GAP_REPORT.md

[analysis] CCCL↔muh 26-algorithm tuning gap report — 294 bench pts needed, 19% line coverage, reduce/scan/topk P0

2026-08-07 01:45:37 +00:00

chat_dataset_v0.json

[DEPLOY] Complete submission: baseline + all optimizations

2026-07-30 16:06:20 +00:00

computility-run.yaml

[critical/deploy] computility-run.yaml: quote numeric env values for YAML safety

2026-08-06 06:29:38 +00:00

deltanet_chunk_optimize.py

[CCCL-PORT] Two architecture-level optimizations from CCCL system design

2026-08-05 08:20:01 +00:00

Dockerfile

[CRITICAL/deploy] fix Docker build: add bash shebang to patch_ops.sh + robust Dockerfile

2026-08-06 06:44:31 +00:00

engine_cccl_patterns.py

[ENGINE] Pattern 7: CCCL C API JIT → Triton autotune mapping

2026-08-06 02:32:34 +00:00

ENGINEX_INJECTION_MAP.md

docs: EngineX vllm injection map — Python not C++, Triton not CUDA, 32KB SMEM claim

2026-08-03 03:59:49 +00:00

enginex-vllm-bi100-qwen36-main.zip

update baseline

2026-07-30 15:19:37 +00:00

GROUND_TRUTH_STATUS_v2.md

[DOC] GROUND_TRUTH_STATUS v2 — based on complete code reading

2026-08-06 02:21:03 +00:00

GROUND_TRUTH_STATUS.md

[STATUS] Ground truth: gen_patch C++ injection dead, real path is Triton+Python tuning

2026-08-05 07:57:53 +00:00

launch_service

sync: align with enginex-vllm-bi100-qwen36 baseline (1902c81f)

2026-07-31 09:43:58 +00:00

muh_cc_dispatch.py

[ENGINE] muh_cc_dispatch + analysis: max_num_seqs=1 from computility-run.yaml

2026-08-06 01:02:21 +00:00

muh_dispatch.py

[muh_dispatch] 修正 head_dim=128→256 + 删除死代码 + 强制 V1

2026-08-05 07:12:26 +00:00

muh_kernel_map.py

[docs+code] lookback delay is a no-op on BI-V100 + V2 compound reduce pattern

2026-08-05 03:35:07 +00:00

MUH_PROJECT_CHECKPOINT.md

[MUH] Fix 7 structural discrepancies vs CCCL — read source, not grep

2026-07-30 14:37:38 +00:00

paged_attention_v2_pytorch.py

[ENGINE] paged_attention_v2: CCCL single-tile fast path + GridEvenShare constants

2026-08-06 02:21:29 +00:00

paged_attention_v2_triton.py

[ARCH] CCCL-derived paged attention kernel architecture + Triton rewrite

2026-07-31 04:13:07 +00:00

paged_attn.py

[ENGINE] apply CCCL GridEvenShare dispatch pattern to V1/V2 attention decision

2026-08-07 01:19:50 +00:00

PIPELINE_REALITY_CHECK.md

feat: add gen_config.py (Python-layer config generator) + pipeline reality check

2026-08-07 03:11:56 +00:00

PIPELINE_STATUS.md

docs: add PIPELINE_STATUS.md — ground truth for muh injection mapping and toolchain status

2026-08-07 01:45:46 +00:00

prefix_prefill.py

[prefill] asymmetric BLOCK_M/BLOCK_N from CCCL AgentReduce insight

2026-08-05 03:07:20 +00:00

README.md

Initial commit

2026-07-30 17:03:23 +08:00

TUNING_SURFACE_TRUTH.md

fix: revert invalid patches, add honest tuning surface assessment

2026-08-03 10:34:28 +00:00

README.md

project_6

Languages

C++ 41.8%

Cuda 31.6%

Python 22.2%

C 2.1%

CMake 1.1%

Other 1.1%