afb5d23b12
From reading cccl_upstream/cub/cub/device/dispatch/kernels/kernel_reduce.cuh:
- SingleTile path: when num_partitions fits in one tile (always true for
BI-V100 attention with <=200 partitions), reduce uses single CTA.
Phase 2 is never the bottleneck.
- StableReductionOrder=false uses atomicAdd to skip pass 2 entirely.
Not applicable to attention (compound accumulator), but confirms
the Phase 2 architecture is correct.
From reading cccl_upstream/cub/cub/agent/single_pass_scan_operators.cuh:
- delay<Delay, GridThreshold=500>(): when gridDim.x < 500, ALL delay
strategies collapse to __threadfence_block(). BI-V100 scan grids
have at most ~12 blocks (100K/8448). ALL delay tuning (ns, dcid, l2w)
is irrelevant — bench_bi100.py's no_delay 'win' was actually noise
between identical __threadfence_block() calls.
From reading cccl_upstream/thrust/examples/summed_area_table.cu:
- inclusive_scan_by_key pattern for per-row operations maps to
per-sequence softmax denominator computation in paged_attention.