dylanyunlong/project_6

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muh-engine 5fbcfff7f3 [ENGINE] fused_moe.py: CCCL kernel_transform_tile assume_divisible

Applied CCCL kernel_transform_tile.cuh patterns to MoE config:

1. assume_divisible<16> principle: BLOCK_SIZE_M always a multiple of 16
   so moe_align_block_size produces token counts compatible with
   vectorized LDG.E.128 loads (128-bit aligned memory access).

2. partition_view pattern: moe_align_block_size already implements
   CCCL's auto-partitioning (pad tokens to BLOCK_SIZE_M boundary),
   added comments linking this to kernel_transform_tile.cuh.

3. GridEvenShare + spread_out_items sizing: added numel 256-1024 tier
   (was collapsing 64→1024 into single BLOCK_SIZE_M=64). For large
   prefill (numel>1024), use 256 to amortize launch overhead.

CCCL file: cub/device/dispatch/kernels/kernel_transform_tile.cuh

2026-08-05 09:30:53 +00:00

[CCCL] 瘦身 + 补全: 移除 cudax/python/libcudacxx-tests 冗余文件, 新增 c2h 测试助手 + cmake 构建系统 + 8 个 CUDA thrust examples

2026-08-03 12:39:26 +00:00

[analysis] MoE execution path: 640+ kernel launches/step, 192 CUDA mallocs/step

2026-08-05 03:58:07 +00:00

[gen_patch] Replace dead .cu injection points with real Triton/config targets

2026-08-05 03:36:37 +00:00

fix: critical config + tuning corrections from CCCL source analysis

2026-08-03 06:45:54 +00:00

qwen3_6_scripts

[CLEANUP] Remove 13 dead patch scripts — only 1 remains (transformers registration)

2026-08-05 08:39:54 +00:00

[ENGINE] fused_moe.py: CCCL kernel_transform_tile assume_divisible

2026-08-05 09:30:53 +00:00

feat: add qwen3_5.py vllm adapter for Qwen3.6-35B-A3B

2026-08-01 13:54:33 +00:00

__init__.py

[DEPLOY] Complete submission: baseline + all optimizations

2026-07-30 16:06:20 +00:00

.gitignore

[housekeeping] add enginex_base/ to gitignore — 解压后的基础引擎仅供本地分析

2026-08-05 07:17:37 +00:00

attention.py

[DEPLOY] Complete submission: baseline + all optimizations

2026-07-30 16:06:20 +00:00

baseline.muh

[MUH] Fix three-layer disconnect — C++ headers are now the single source of truth

2026-07-30 14:12:33 +00:00

BI_V100_BENCHMARK_RUNBOOK.md

[docs] BI-V100 benchmark runbook: Phase 0 硬件探测 + Phase 1 quick sweep + Phase 3 端到端验证

2026-08-04 01:14:30 +00:00

CCCL_INTEGRATION_STATUS.md

docs: CCCL integration status — 462 assets inventory, 8/8 decode hot path coverage, no-clone-more verdict

2026-08-03 03:50:24 +00:00

chat_dataset_v0.json

[DEPLOY] Complete submission: baseline + all optimizations

2026-07-30 16:06:20 +00:00

computility-run.yaml

[CRITICAL] yaml 恢复到基础引擎原版——先通过功能测试再优化性能

2026-08-05 07:47:07 +00:00

deltanet_chunk_optimize.py

[CCCL-PORT] Two architecture-level optimizations from CCCL system design

2026-08-05 08:20:01 +00:00

Dockerfile

[SIMPLIFY] Dockerfile 恢复到基础引擎原版 4 行——所有适配通过 patch_ops.sh

2026-08-05 07:14:23 +00:00

ENGINEX_INJECTION_MAP.md

docs: EngineX vllm injection map — Python not C++, Triton not CUDA, 32KB SMEM claim

2026-08-03 03:59:49 +00:00

enginex-vllm-bi100-qwen36-main.zip

update baseline

2026-07-30 15:19:37 +00:00

GROUND_TRUTH_STATUS.md

[STATUS] Ground truth: gen_patch C++ injection dead, real path is Triton+Python tuning

2026-08-05 07:57:53 +00:00

launch_service

sync: align with enginex-vllm-bi100-qwen36 baseline (1902c81f)

2026-07-31 09:43:58 +00:00

muh_cc_dispatch.py

[ENGINE] muh_cc_dispatch.py: CCCL cc_dispatch.cuh Python port

2026-08-05 09:25:48 +00:00

muh_dispatch.py

[muh_dispatch] 修正 head_dim=128→256 + 删除死代码 + 强制 V1

2026-08-05 07:12:26 +00:00

muh_kernel_map.py

[docs+code] lookback delay is a no-op on BI-V100 + V2 compound reduce pattern

2026-08-05 03:35:07 +00:00

MUH_PROJECT_CHECKPOINT.md

[MUH] Fix 7 structural discrepancies vs CCCL — read source, not grep

2026-07-30 14:37:38 +00:00

paged_attention_v2_pytorch.py

[v2] document CCCL kernel_reduce.cuh SingleTile + scan GridThreshold=500 insights

2026-08-05 03:57:29 +00:00

paged_attention_v2_triton.py

[ARCH] CCCL-derived paged attention kernel architecture + Triton rewrite

2026-07-31 04:13:07 +00:00

paged_attn.py

[ENGINE] paged_attn.py: CCCL dispatch_reduce architecture port

2026-08-05 09:22:46 +00:00

prefix_prefill.py

[prefill] asymmetric BLOCK_M/BLOCK_N from CCCL AgentReduce insight

2026-08-05 03:07:20 +00:00

README.md

Initial commit

2026-07-30 17:03:23 +08:00

TUNING_SURFACE_TRUTH.md

fix: revert invalid patches, add honest tuning surface assessment

2026-08-03 10:34:28 +00:00

README.md

project_6

Languages

C++ 41.8%

Cuda 31.6%

Python 22.2%

C 2.1%

CMake 1.1%

Other 1.1%