project_6 3cc97c1d4e [docs] CCCL scan architecture — lookback vs lookahead, tile_state allocation, grid sizing
Key findings from reading dispatch_scan.cuh:
1. Lookahead scan requires PTX ISA >= 860 (NVIDIA SM100+), completely
   unavailable on BI-V100. Our lookback-only strategy is correct.
2. Lookback scan passes 0 dynamic SMEM — SMEM is all static via
   __shared__. Different from lookahead which uses dynamic stages.
3. Scan launches exactly num_tiles blocks (not sm_count * subscription),
   one CTA per tile. For 100K tokens: ~12 tiles all fit in one wave
   on 16 SMs, explaining why no_delay (dcid=0) is optimal.
4. Lookahead's num_stages auto-tuning is irrelevant for BI-V100 but
   reveals NVIDIA's pipeline depth selection strategy.
2026-08-05 03:21:51 +00:00
2026-07-30 17:03:23 +08:00

project_6

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