dylanyunlon
9b21a13119
[MUH] Bootstrap muh toolchain — extract/parse/gen_yaml/gen_patch + baseline.muh
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Pipeline:
1. extract.py: Parses all 26 CCCL tuning_*.cuh → 26 YAML schemas in muh/schema/
2. parse.py: .muh file parser with extends-inheritance + schema validation
3. gen_yaml.py: .muh → computility-run.yaml (verified: matches competition reference)
4. gen_patch.py: .muh → vllm kernel unified diff patches (6 algorithm mappings)
5. baseline.muh: Competition reference config, all tuning values pending BI-V100 benchmarks
Schemas extracted:
26 algorithms, 8-19 params each, SM75/80/90/100 reference tunings
Priority mapping: reduce→attention, topk→sampling, scan→paged_attention,
transform→activations, batch_memcpy→KV_cache, for→RoPE
Tested: extract→parse→validate→gen_yaml→gen_patch full pipeline passes
2026-07-30 10:39:06 +00:00
EngineX CI
56fd68e7dd
[INFRA] Import NVIDIA/CCCL upstream as optimization reference library
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CCCL (CUDA C++ Core Libraries) provides:
- CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk)
- Thrust: high-level parallel algorithms (transform_reduce, sort, scan)
- libcudacxx: CUDA C++ standard library (atomics, barriers, memory)
- cudax: experimental features (memory resources, allocators)
- Tuning policies: per-SM hardware-specific algorithm parameters
Competition optimization vectors mapped to CCCL:
- Output TPS (83% weight): warp_reduce, block_reduce, device_topk
- Input TPS (14% weight): device_scan, block_load, prefetch
- Cache TPS (3% weight): prefix caching strategy patterns
- Memory (0.9 util): pooled/cached/buddy allocators
Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only)
License: Apache-2.0
2026-07-30 09:35:51 +00:00
