dylanyunlon
5f880bb279
[MUH] Add C++/CUDA tuning headers — the real muh, not Python wrappers
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The core of muh is now C++ headers that mirror CCCL's tuning architecture:
muh/include/muh/
├── hardware.cuh — hardware_capability descriptor (replaces cuda::compute_capability)
├── muh.cuh — top-level include + scoring formula
└── tuning/
├── common.cuh — shared types, compatible with CCCL's common.cuh
├── tuning_reduce.cuh — P0: attention reduction (5 type specializations)
├── tuning_topk.cuh — P0: sampling top-k/top-p (2B/4B key specializations)
├── tuning_scan.cuh — P0: prefix scan (6 lookback + 6 lookahead specializations)
├── tuning_transform.cuh — P1: activation elementwise (SiLU/GELU/RMSNorm)
├── tuning_batch_memcpy.cuh — P1: KV cache block copy
└── tuning_for.cuh — P2: RoPE position encoding
Architecture:
- Each tuning header has a policy_selector struct with operator()(hardware_capability)
- Dispatches on muh::hardware_capability instead of cuda::compute_capability
- bi100_* structs hold per-type tuning values (initialized from CCCL SM100 reference)
- When CCCL headers are available, re-exports their enum types
- When standalone, provides compatible enum definitions
Python files (extract.py, parse.py, gen_yaml.py, gen_patch.py) remain as tooling.
The C++ headers are what actually gets compiled into the vllm binary.
2026-07-30 14:01:07 +00:00
dylanyunlon
9b21a13119
[MUH] Bootstrap muh toolchain — extract/parse/gen_yaml/gen_patch + baseline.muh
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Pipeline:
1. extract.py: Parses all 26 CCCL tuning_*.cuh → 26 YAML schemas in muh/schema/
2. parse.py: .muh file parser with extends-inheritance + schema validation
3. gen_yaml.py: .muh → computility-run.yaml (verified: matches competition reference)
4. gen_patch.py: .muh → vllm kernel unified diff patches (6 algorithm mappings)
5. baseline.muh: Competition reference config, all tuning values pending BI-V100 benchmarks
Schemas extracted:
26 algorithms, 8-19 params each, SM75/80/90/100 reference tunings
Priority mapping: reduce→attention, topk→sampling, scan→paged_attention,
transform→activations, batch_memcpy→KV_cache, for→RoPE
Tested: extract→parse→validate→gen_yaml→gen_patch full pipeline passes
2026-07-30 10:39:06 +00:00
EngineX CI
70e80c5810
[DOC] Append CCCL tuning analysis to checkpoint — all 27 files consumed as model input
2026-07-30 10:30:36 +00:00
EngineX CI
e7fdf5777a
[DOC] Add MUH project checkpoint — single source of truth for context continuity
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This document allows any new Claude session to pick up exactly where
the current session left off. Contains:
- Competition rules and scoring formula
- Testing pipeline (how the platform evaluates submissions)
- muh language architecture (3-layer: schema → config → codegen)
- All completed work (issues #1-#25)
- What's next
- Key file paths and parameters
2026-07-30 09:59:15 +00:00
EngineX CI
56fd68e7dd
[INFRA] Import NVIDIA/CCCL upstream as optimization reference library
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CCCL (CUDA C++ Core Libraries) provides:
- CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk)
- Thrust: high-level parallel algorithms (transform_reduce, sort, scan)
- libcudacxx: CUDA C++ standard library (atomics, barriers, memory)
- cudax: experimental features (memory resources, allocators)
- Tuning policies: per-SM hardware-specific algorithm parameters
Competition optimization vectors mapped to CCCL:
- Output TPS (83% weight): warp_reduce, block_reduce, device_topk
- Input TPS (14% weight): device_scan, block_load, prefetch
- Cache TPS (3% weight): prefix caching strategy patterns
- Memory (0.9 util): pooled/cached/buddy allocators
Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only)
License: Apache-2.0
2026-07-30 09:35:51 +00:00
dylanyunlon
b4d01f481e
Initial commit
2026-07-30 17:03:23 +08:00
