VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb.f16.gguf at 63527ab1ab4f772b86114fc6e542961f384bdc4d - VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF - Gitea: Git with a cup of tea

mradermacher/VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF

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ModelHub XC 63527ab1ab 初始化项目，由ModelHub XC社区提供模型

Model: mradermacher/VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF
Source: Original Platform

2026-05-09 00:17:13 +08:00

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