mradermacher/VeriReason-Qwen2.5-1.5b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF
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Model: mradermacher/VeriReason-Qwen2.5-1.5b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF
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2026-06-10 10:47:16 +08:00
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version https://git-lfs.github.com/spec/v1
oid sha256:eeda2e6802e4169a359f25cf5a009df9d7d4b01df2043c175e95e1b43acafc6b
size 3093670336