This website requires JavaScript.
Explore
Help
Register
Sign In
mradermacher
/
Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B-GGUF
Watch
1
Star
0
Fork
0
You've already forked Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B-GGUF
Code
Issues
Pull Requests
Actions
Projects
Releases
Wiki
Activity
1
Commit
1
Branch
0
Tags
be74c331a4fcff37c3298cbf64620cb1f4c18dc2
Commit Graph
1 Commits
Author
SHA1
Message
Date
ModelHub XC
be74c331a4
初始化项目,由ModelHub XC社区提供模型
...
Model: mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B-GGUF Source: Original Platform
2026-05-26 02:47:15 +08:00