初始化项目,由ModelHub XC社区提供模型
Model: mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-7B-GGUF Source: Original Platform
This commit is contained in:
3
Qwen-2.5-Instruct-Verilog-Reasoning-7B.Q8_0.gguf
Normal file
3
Qwen-2.5-Instruct-Verilog-Reasoning-7B.Q8_0.gguf
Normal file
@@ -0,0 +1,3 @@
|
||||
version https://git-lfs.github.com/spec/v1
|
||||
oid sha256:18075dc3da9d3b4db9d11c0916b7b7ce606414bb0e74dd28538313dbc44a4f76
|
||||
size 8098525632
|
||||
Reference in New Issue
Block a user