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Qwen-2.5-Instruct-Unverifie…/Qwen-2.5-Instruct-Unverified-Verilog-Reasoning-GT-7B.f16.gguf
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Model: mradermacher/Qwen-2.5-Instruct-Unverified-Verilog-Reasoning-GT-7B-GGUF
Source: Original Platform
2026-05-26 04:21:16 +08:00

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version https://git-lfs.github.com/spec/v1
oid sha256:704f29c7aa373d7219889dc0212df3b23423241861c2e59d211bdfcec9aee0f4
size 15237853664