mradermacher/Qwen-2.5-Instruct-Unverified-Verilog-Reasoning-GEN-7B-GGUF
1
0
Fork 0
Code Issues Pull Requests Actions Projects Releases Wiki Activity

初始化项目，由ModelHub XC社区提供模型

Browse Source 
Model: mradermacher/Qwen-2.5-Instruct-Unverified-Verilog-Reasoning-GEN-7B-GGUF
Source: Original Platform
This commit is contained in:
ModelHub XC
2026-05-26 04:46:16 +08:00
commit ab2a6c78a9
14 changed files with 152 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
Qwen-2.5-Instruct-Unverified-Verilog-Reasoning-GEN-7B.Q2_K.gguf Normal file
View File

@@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:3fa6fa90db8cbe48c8980c7a5b6fffe4782b3953ef46442fc5ffbfd55bda4ca7
size 3015940576