Commit Graph

  • 29f119c094 [ENGINE] vllm/attention/ops/paged_attn.py: CCCL block_reduce_raking V1/V2 dispatch muh-engine 2026-08-06 01:18:34 +00:00
  • e3f85e79ee [DEPLOY] sync qwen3_6_scripts/ with latest engine changes for submission muh 2026-08-06 01:04:55 +00:00
  • b80fd2b56b [ENGINE] paged_attn V2: CCCL agent_merge_sort union TempStorage cache muh-engine 2026-08-06 01:04:01 +00:00
  • 0d810ff989 [ENGINE] muh_cc_dispatch + analysis: max_num_seqs=1 from computility-run.yaml muh-engine 2026-08-06 01:02:15 +00:00
  • d70deefae1 [ENGINE] sampler.py: CCCL bit_packed_counter documentation + cache retention muh 2026-08-06 01:00:46 +00:00
  • 082ded7d69 [ENGINE] xformers.py: CCCL GQA broadcast eliminates 6x repeat_interleave in sdpa_fallback muh 2026-08-06 00:59:40 +00:00
  • c7d3da7922 [ENGINE] sampler.py: CCCL counting_iterator tensor reuse pattern muh-engine 2026-08-06 00:15:02 +00:00
  • 50c731412a [INSIGHT] tuning_scan: gridDim.x < 500 makes ALL delay policies equivalent on BI-V100 muh 2026-08-05 09:32:21 +00:00
  • 28b4701935 [ENGINE] paged_attn: CCCL spread_out_items_per_thread adaptive tile sizing muh 2026-08-05 09:31:11 +00:00
  • 5fbcfff7f3 [ENGINE] fused_moe.py: CCCL kernel_transform_tile assume_divisible muh-engine 2026-08-05 09:30:53 +00:00
  • 18c42c099d [ENGINE] triton_flash_attention.py: CCCL make_warp_uniform autotune muh-engine 2026-08-05 09:29:23 +00:00
  • c0395ade14 [ENGINE] muh_cc_dispatch.py: CCCL cc_dispatch.cuh Python port muh-engine 2026-08-05 09:25:48 +00:00
  • 8c969ce7dc [ENGINE] paged_attn.py: CCCL dispatch_reduce architecture port muh-engine 2026-08-05 09:22:46 +00:00
  • 821c59500d [CLEANUP] Remove 13 dead patch scripts — only 1 remains (transformers registration) dylanyunlon 2026-08-05 08:39:54 +00:00
  • b902090fb2 [FIX] Deploy _custom_ops.py SMEM 32KB→48KB fix — was in repo but never deployed dylanyunlon 2026-08-05 08:38:36 +00:00
  • 81972a05c6 [CCCL-PORT] Three-tier decode dispatch from kernel_segmented_reduce.cuh Claude 2026-08-05 08:38:15 +00:00
  • f3810c53ae [ARCH] Eliminate 2 more patch scripts — registry.py + tool_parsers __init__.py dylanyunlon 2026-08-05 08:36:45 +00:00
  • 503009596d [CCCL-PORT] CachingDeviceAllocator buffer reuse in prefix attention tile loop Claude 2026-08-05 08:36:10 +00:00
  • 8cdac642de [CCCL-PORT] Functional verification from three_way_partition test pattern + sampler deploy dylanyunlon 2026-08-05 08:31:48 +00:00
  • 6d0965195c [CCCL-PORT] Try native FusedMoE kernel before PyTorch fallback Claude 2026-08-05 08:31:31 +00:00
  • 44bdf49cae [CCCL-PORT] Deploy sampler.py top-k fast path from partition/flagged.cu dylanyunlon 2026-08-05 08:30:21 +00:00
  • 327f9fbf40 [ARCH] Eliminate AST patch scripts — full file replacements only dylanyunlon 2026-08-05 08:24:38 +00:00
  • 10af71357b [CCCL-PORT] Two architecture-level optimizations from CCCL system design Claude 2026-08-05 08:19:55 +00:00
  • 0b94081051 [FIX] Sync paged_attn.py to qwen3_6_scripts/ — Docker COPY target dylanyunlon 2026-08-05 08:16:29 +00:00
  • 269f6eebba [CCCL-PORT] summary_statistics.cu transform_reduce pattern → online softmax design doc dylanyunlon 2026-08-05 08:12:12 +00:00
  • 1a4e100583 [CCCL-PORT] agent_reduce vectorized load pattern + explicit memory management dylanyunlon 2026-08-05 08:11:19 +00:00
  • f7f8113c73 [CCCL-PORT] Adaptive tile sizing from dispatch_reduce.cuh GridEvenShare dylanyunlon 2026-08-05 08:10:29 +00:00
  • 15753cb68d [STATUS] Ground truth: gen_patch C++ injection dead, real path is Triton+Python tuning dylanyunlon 2026-08-05 07:57:53 +00:00
  • 96f64650cf [CRITICAL] yaml 恢复到基础引擎原版——先通过功能测试再优化性能 muh-bot 2026-08-05 07:47:07 +00:00
  • 5e618bf480 [housekeeping] add enginex_base/ to gitignore — 解压后的基础引擎仅供本地分析 muh-bot 2026-08-05 07:17:37 +00:00
  • a7a72e496c Merge branch 'main' of https://github.com/dylanyunlon/project_6 muh-bot 2026-08-05 07:14:27 +00:00
  • a7f95a5943 [SIMPLIFY] Dockerfile 恢复到基础引擎原版 4 行——所有适配通过 patch_ops.sh muh-bot 2026-08-05 07:14:23 +00:00
  • 3426d8185a [muh_dispatch] 修正 head_dim=128→256 + 删除死代码 + 强制 V1 muh-bot 2026-08-05 07:12:26 +00:00
  • f3a4e7ecfe [CRITICAL] Restore original enginex paged_attn.py — Triton kernel hangs BI-V100 project_6 2026-08-05 07:11:59 +00:00
  • cfa6516cc6 [BUGFIX] patch_paged_attention_v2.py: NameError V2_MODULE undefined → V2_MODULE_PYTORCH muh-bot 2026-08-05 07:07:54 +00:00
  • fd2ff241fb [perf] sampler: fast path for top_k without top_p — torch.topk replaces full sort Claude 2026-08-05 06:32:35 +00:00
  • 8070690aac [perf] MoE align_block_size: pre-allocate sort buffers, eliminate 192 CUDA mallocs/step Claude 2026-08-05 06:31:11 +00:00
  • 730831f267 [fix] paged_attn: re-force V1 — V2 is pure PyTorch, not C++ (confirmed from _custom_ops.py) Claude 2026-08-05 06:27:17 +00:00
  • b6e7bca45a [perf] paged_attn: restore V1/V2 adaptive dispatch + V2 tensor pre-alloc + PARTITION_SIZE 512→1024 Claude 2026-08-05 06:26:16 +00:00
  • d3b110803c [perf] MoE intermediate cache pre-allocation: eliminate 189 CUDA mallocs per decode step project_6 2026-08-05 03:58:46 +00:00
  • 4e16133c7a [analysis] MoE execution path: 640+ kernel launches/step, 192 CUDA mallocs/step project_6 2026-08-05 03:58:06 +00:00
  • afb5d23b12 [v2] document CCCL kernel_reduce.cuh SingleTile + scan GridThreshold=500 insights muh-bot 2026-08-05 03:57:25 +00:00
  • 60f0e2a61c [CRITICAL] Force V1 decode: PyTorch V2 is 10-50x slower than ixformer V1 muh-bot 2026-08-05 03:56:54 +00:00
  • 5ca49d0e7c [docs] GridEvenShare work distribution — BI-V100 attention reduce needs only 9 CTAs project_6 2026-08-05 03:36:44 +00:00
  • ce42a8579d [gen_patch] Replace dead .cu injection points with real Triton/config targets project_6 2026-08-05 03:36:33 +00:00
  • c17e517e9e [docs] CCCL transform architecture — vectorized vs prefetch, bytes_in_flight scope project_6 2026-08-05 03:36:00 +00:00
  • 5d6f159906 [v2] Phase 2 kernel fusion: save 1 division launch + CCCL sources read project_6 2026-08-05 03:35:10 +00:00
  • e36da2efa9 [docs+code] lookback delay is a no-op on BI-V100 + V2 compound reduce pattern project_6 2026-08-05 03:35:06 +00:00
  • 162a45d4ea [muh_kernel_map] fix syntax error + add bytes_in_flight from CCCL babelstream benchmark muh-bot 2026-08-05 03:34:08 +00:00
  • f8153d492a [docs] agent_scan.cuh architecture — scan SMEM is real, reduce SMEM is not project_6 2026-08-05 03:33:38 +00:00
  • fa8a02c642 Merge branch 'main' of https://github.com/dylanyunlon/project_6 muh-bot 2026-08-05 03:32:38 +00:00
  • 41ecb8c9e9 [analysis] 关键架构发现: gen_patch 注入目标不存在 + paged_attn V1 硬编码 muh-bot 2026-08-05 03:32:31 +00:00
  • 44e4f6f947 [v2] PARTITION_SIZE 512→1024 + fix import path project_6 2026-08-05 03:32:23 +00:00
  • a0cddf2ddc Merge branch 'main' of https://github.com/dylanyunlon/project_6 muh-bot 2026-08-05 03:26:40 +00:00
  • 8d26e23e8e [muh] fix scale_reg: 补上 CCCL scale_reg_bound 的 threads SMEM cap muh-bot 2026-08-05 03:26:36 +00:00
  • 33e1a21a66 [v2] Wire paged_attention_v2_pytorch into vllm — enable V2 for long sequences project_6 2026-08-05 03:26:18 +00:00
  • faedfab7e9 Merge branch 'main' of https://github.com/dylanyunlon/project_6 muh-bot 2026-08-05 03:22:21 +00:00
  • 23e34fde33 [muh] tuning_radix_sort: 148→211行, 基于 CCCL 2381 行源码完整重建 10-子策略架构 muh-bot 2026-08-05 03:22:17 +00:00
  • 3cc97c1d4e [docs] CCCL scan architecture — lookback vs lookahead, tile_state allocation, grid sizing project_6 2026-08-05 03:21:47 +00:00
  • b50bd2dfd5 [gen_patch] fix critical struct selection: dispatch by kernel data type muh-bot 2026-08-05 03:20:39 +00:00
  • 55b704c0e0 [docs] CCCL reduce architecture deep dive — SMEM model correction + V1/V2 dispatch finding project_6 2026-08-05 03:20:51 +00:00
  • 2795d2b7f2 [muh] tuning_reduce: 修正 SMEM 模型错误 (基于 agent_reduce.cuh 源码分析) muh-bot 2026-08-05 03:20:38 +00:00
  • 6bf73bdacb [moe] BLOCK_SIZE_M heuristic refined for BI-V100 decode workload project_6 2026-08-05 03:17:53 +00:00
  • 5379a573ac [yaml+prefill] num-scheduler-steps 8→16 from CCCL delay analysis project_6 2026-08-05 03:16:01 +00:00
  • db0df78580 [gen_patch] fix 3 critical bugs: reduce struct selection, topk bits_per_pass injection, transform/batch_memcpy extraction project_6 2026-08-05 03:15:12 +00:00
  • 2c43eb524f [flash_attn] CCCL-derived autotune configs: num_stages=2 + small-tile project_6 2026-08-05 03:09:45 +00:00
  • 8a87e378f8 [prefill] asymmetric BLOCK_M/BLOCK_N from CCCL AgentReduce insight project_6 2026-08-05 03:07:14 +00:00
  • 8a38c04b4c [vllm] 3 个运行时 bug 修复: SMEM 32KB→48KB, NUM_WARPS 8→4, v2 归一化 dylanyunlon 2026-08-04 12:26:24 +00:00
  • 11032fe95e [muh] delay v2 完成: 全部 8 个 lookback 算法改为 no_delay muh-bot 2026-08-04 07:18:48 +00:00
  • a898faa34e [muh] delay v2: reduce_by_key + scan_by_key 全部改为 no_delay muh-bot 2026-08-04 07:17:34 +00:00
  • 31d39e6032 [muh] 首批 BI-V100 实测数据写入 3 个 tuning headers: scan/topk/transform dylanyunlon 2026-08-04 07:13:01 +00:00
  • 475574fd3d [muh] bench_triton_real + bi100_configs: REAL tunable surface benchmark project_6 2026-08-04 06:19:07 +00:00
  • 5747e7c290 [docs] BI-V100 benchmark runbook: Phase 0 硬件探测 + Phase 1 quick sweep + Phase 3 端到端验证 Claude 2026-08-04 01:14:30 +00:00
  • 12ad7a3190 [muh] 7 headers 完整移植 CCCL tuning tables: segmented_sort 7%→29%, merge_sort 22%→43%, merge 30%→49%, adjacent_difference 38%→65%, batch_memcpy 37%→41%, find 35%→43%, find_bound 31%→44% dylanyunlon 2026-08-03 21:36:46 +00:00
  • 2badbfa1b9 merge: resolve conflicts, keep full CCCL port versions muh-bot 2026-08-03 21:35:31 +00:00
  • c7ff12c28d [muh] scan_by_key 14%→13%, rle_non_trivial_runs 7%→10%, rle_encode 9%→10%: 从 CCCL 3325 行源码完整移植 muh-bot 2026-08-03 21:35:16 +00:00
  • 6a56649d9a [muh] radix_sort 6%→19%, rle_encode 8%→21%, rle_non_trivial_runs 6%→18%: 完整移植 CCCL SM90/SM100 tuning tables + BI-V100 SMEM 48KB 约束 dylanyunlon 2026-08-03 13:14:54 +00:00
  • 1b74226910 [muh] reduce_by_key 12%→16%: 从 CCCL 1735 行源码完整移植 66 条 SM80/SM90/SM100 tuning entries muh-bot 2026-08-03 13:11:31 +00:00
  • 5923223cba [muh] three_way_partition 7%→13%, histogram 13%→21%: 继续从 CCCL 源码移植 SM80/SM90/SM100 tuning tables muh-bot 2026-08-03 13:02:58 +00:00
  • c350c1c7e5 [muh] select_if 5%→17%, unique_by_key 3%→11%: 从 CCCL 源码完整移植 SM80/SM90/SM100 三代 tuning table muh-bot 2026-08-03 13:01:11 +00:00
  • 24ef6a91b5 [CCCL] 瘦身 + 补全: 移除 cudax/python/libcudacxx-tests 冗余文件, 新增 c2h 测试助手 + cmake 构建系统 + 8 个 CUDA thrust examples muh-bot 2026-08-03 12:39:26 +00:00
  • a2a5dd8f00 feat: asymmetric BLOCK_M/BLOCK_N search + re-add BI-V100 autotune configs Claude 2026-08-03 11:18:18 +00:00
  • fe64650681 add muh/run_on_bi100.sh — single-paste diagnostic + benchmark for Phanthy Cloud dylanyunlon 2026-08-03 10:51:20 +00:00
  • 327497dc17 feat(muh): add bench_triton_prefill.py — real compile-time param injection benchmark dylanyunlon 2026-08-03 10:46:19 +00:00
  • 8c1955dc92 fix: revert invalid patches, add honest tuning surface assessment dylanyunlon 2026-08-03 10:34:28 +00:00
  • dc9ac0a757 feat(muh): apply CCCL-derived BI-V100 tuning to 5 vllm Python files dylanyunlon 2026-08-03 10:27:10 +00:00
  • 094c710efa feat(muh): add bench_bi100.py — CCCL BruteForceSeeker for BI-V100 dylanyunlon 2026-08-03 10:24:37 +00:00
  • 9f93d695a9 feat: deploy CCCL-tuned prefix_prefill + muh_dispatch + fix SM=16 count Claude 2026-08-03 08:30:16 +00:00
  • 8e9c22f6c1 feat: CCCL-derived 3-tier decode dispatch + SM=16 prefill tuning + multi-step scheduling Claude 2026-08-03 08:28:38 +00:00
  • 16981f221e feat(muh): reduce_by_key 55→203 lines — full key_size×accum_size dispatch Claude 2026-08-03 07:20:23 +00:00
  • bdaec8da4b feat(muh): select_if SM=16 tile maximization Claude 2026-08-03 07:19:13 +00:00
  • 95d872e8f5 feat(muh): scan_by_key 53→284 lines — full key_size×val_size type dispatch Claude 2026-08-03 07:18:23 +00:00
  • 88db0ed89c feat(muh): SM=16 tuning overhaul — reduce/scan/transform Claude 2026-08-03 07:16:35 +00:00
  • 0ba4cdb025 fix: dial back max-num-seqs 256→8, revert batched-tokens and mem-util Claude 2026-08-03 06:51:33 +00:00
  • cdc01bbc6a fix: critical config + tuning corrections from CCCL source analysis Claude 2026-08-03 06:45:54 +00:00
  • 071fa361a3 docs: CCCL → Triton methodology transfer — parameter search translation table Claude 2026-08-03 04:37:23 +00:00
  • e48a46a30d docs: EngineX vllm injection map — Python not C++, Triton not CUDA, 32KB SMEM claim Claude 2026-08-03 03:59:49 +00:00
  • 9bba7f4c79 docs: CCCL integration status — 462 assets inventory, 8/8 decode hot path coverage, no-clone-more verdict Claude 2026-08-03 03:50:24 +00:00
  • 392e644611 feat: add qwen3_5.py vllm adapter for Qwen3.6-35B-A3B Claude 2026-08-01 13:54:25 +00:00
  • 6beb497447 fix(hardware): SM count 50→16 confirmed on Phanthy Cloud BI-V100 root 2026-08-01 13:39:28 +00:00