project6-dev
a54dbda3bb
fix(bridge): link against libixformer.so for silu_and_mul symbol
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- ix_bridge.py: auto-discover ixformer .so files, pass as extra_ldflags
- ix_moe_bridge.cpp: fix mangled header from bad sed, add #include <optional>
- verify_single_gpu.py: also pass extra_ldflags during JIT compile
The undefined symbol _ZN8ixformer5infer12silu_and_mulERN2at6TensorES3_
lives in libixformer.so — need to explicitly link it.
2026-08-10 06:29:11 +00:00
project6-dev
d86b39d1ae
refactor(corex): rewrite 3 dlopen modules to use real ixformer::infer dispatch chain
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corex_moe.py:
- Tier 0: ix_bridge.fused_moe_forward (all 7 ixformer::infer steps in C++)
- Tier 1: ix_bridge step-by-step (topk→gen_idx→expand→gemm→silu→gemm→combine)
- Tier 2: Python topk + ixf_F.silu_and_mul + torch.matmul expert loop
corex_gdn.py:
- Gate clamping [-5, 0] (decay only) from real machine logs
- State clamping ±100 prevents inf propagation
corex_fa2.py:
- Tier 0: ix_bridge C++ paged_attention/flash_attn
- Tier 1: ixformer.contrib.vllm_flash_attn Python
- Tier 2: ixf_F.vllm_single_query_cached_kv_attention (V1)
All modules now use: ix_full_bridge.cpp → ixformer::infer → libixattn.so
Matches comp 168 actual dispatch chain from docker log.
2026-08-10 06:16:39 +00:00
EX Engine
1ae398eeee
fix(interface): corex_moe accepts w13 merged format + no silent fallback
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corex_moe.py: moe_forward now accepts both formats:
Format A: w1(E,I,H) + w2(E,H,I) + w3(E,I,H) — xllm style, separate gate/up
Format B: w13(E,2*I,H) + w2(E,H,I) + w3=None — vllm style, merged gate_up
Auto-detects by checking if w3 is None, splits w13 internally.
qwen3_5.py:
- Fix corex_moe call: use keyword args (w3=None, topk=self.top_k)
prevents topk integer going to w3 tensor position
- Remove silent fallback on corex_moe failure — raise RuntimeError
with full shape info for diagnosis. Zero score with no error log
is worse than a crash.
2026-08-10 04:36:16 +00:00
project6-dev
44d36e6ccc
build: add MoE topk kernel precompile to patch_ops.sh + Dockerfile pipeline
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patch_ops.sh: step 7 precompiles moe_topk_softmax_v3.cu during Docker build
corex_moe.py: expanded .so/.cu search paths for both pre-compiled and JIT scenarios
Docker build flow:
1. COPY ex_engine/ → /workspace/ex_engine/
2. patch_ops.sh deploys corex_moe.py + corex_gdn.py to vllm models dir
3. patch_ops.sh runs precompile_moe_topk.py → .so cached
4. At runtime, corex_moe.py loads cached .so (no JIT delay)
Competition submission ready.
2026-08-10 04:26:33 +00:00
project6-dev
f32ef97013
feat(MoE): verified CUDA topk_softmax kernel — zero fallback
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moe_topk_softmax_v3.cu: BI-V100 verified (2026-08-10)
- 64 experts, topk=8, warp shuffle, zero shared memory
- renormalize: sum=1.0 ✓, no NaN ✓, no duplicate ids ✓
- 881 token batch ✓
- Compiler: corex clang/16, --cuda-gpu-arch=ivcore10
- Stream: c10::cuda::getCurrentCUDAStream()
corex_moe.py: loads CUDA kernel, NO Python fallback
- Searches pre-compiled .so → JIT compile from source → error
- MoE pipeline: CUDA topk → cublas expert GEMM → ixformer silu_and_mul
precompile_moe_topk.py: Docker build-time compilation + verification
Key finding from real machine probing:
ixformer::infer::topk_softmax is DECLARED in ixformer.h but
NOT IMPLEMENTED in any .so in the base image (nm -D scan: zero hits).
Must compile our own kernel.
2026-08-10 04:21:43 +00:00
EX Engine
f955dd127e
feat(EX): ix_full_bridge — all 14 ixformer::infer functions bridged
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Upstream source: xllm/core/kernels/ilu/ixformer.h (Apache 2.0)
Wrapper patterns: xllm/core/kernels/ilu/{attention,norm,rope,activation,fused_moe,group_gemm}.cpp
Complete bridge (ix_full_bridge.cpp, 331 lines):
MoE: topk_softmax, gen_idx, expand, group_gemm, silu_mul, combine, fused_forward
Attention: paged_attention (decode), flash_attn_prefill (prefill)
Norm: rms_norm, fused_add_rms_norm
RoPE: rotary_embedding
Cache: reshape_and_cache
Linear: ixformer_linear
ix_bridge.py: tries ix_full_bridge first, falls back to ix_moe_bridge
patch_ops.sh: deploys both .cpp files to all JIT search paths
Copied ixformer.h + utils.h headers for reference
2026-08-10 04:01:42 +00:00
project6-dev
5efb0fcc35
feat(EX): corex_fa2.py — third dlopen module from comp 168 AST chain
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Log analysis from dockerrizhi.txt (07-23 Sub168 run) reveals THREE
corex modules, not two:
1. corex_gdn.py — GatedDeltaNet fused kernel (already implemented)
2. corex_moe.py — MoE routing + expert GEMM (already implemented)
3. corex_fa2.py — FlashAttention2 dispatch (NEW)
corex_fa2.py handles 32/36 attention layers with three modes:
:333 → FA2 packed prefill (B=2 Hq=4 Hkv=1 D=256 max_q=2048)
:507 → FA2 paged chunked prefill (B=1 max_q=17 cache_blocks=2)
:225 → FA2 paged decode (B=1 max_k=45455 partition=256)
Wraps ixformer.contrib.vllm_flash_attn + ixf_F.vllm_single_query_cached_kv_attention.
These .so files EXIST in the base image (libixattn.so).
Also: wired corex_fa2 import into qwen3_5.py + deploy script.
2026-08-10 04:01:21 +00:00
EX Engine
388f6b2d1a
feat(MoE): wire full ix_fused_moe_forward as Tier 0 dispatch
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ix_bridge.py: expose all 6 ixformer::infer functions + fused_moe_forward()
qwen3_5.py: 4-tier MoE dispatch (fused C++ → CUB topk → ix topk → PyTorch)
patch_ops.sh: deploy ix_moe_bridge.cpp to 4 search paths for JIT
2026-08-10 03:38:46 +00:00
project6-dev
1be9449883
feat(EX): corex_gdn + corex_moe — dlopen dispatch chain from comp 168 log analysis
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From 2d5232c5
2026-08-10 03:37:15 +00:00
EngineX
7839982707
feat(EX): wire xllm CUB topk_softmax kernel into MoE routing
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Upstream: xllm/kernels/cuda/moe/moe_topk_softmax_kernels.cuh (Apache 2.0)
Adapted: CHECK→TORCH_CHECK, include path fix, cuda/functional guard, pybind11
Call chain now:
qwen3_5.py:_pure_pytorch_experts()
→ _ex_moe_topk_softmax (fused CUB kernel, 1 launch)
→ fallback: torch.softmax + torch.topk (3 launches)
Files:
ex_engine/csrc/moe/moe_topk_softmax_kernels.cuh — xllm kernel (adapted)
ex_engine/csrc/moe/device_utils.cuh — xllm device utils
ex_engine/csrc/moe/moe_topk_softmax_ext.cu — pybind11 wrapper
ex_engine/python/moe_topk.py — JIT loader (same pattern as flash_qla_sm70)
qwen3_5.py — import + use in _pure_pytorch_experts()
patch_ops.sh — deploy kernel sources for JIT
2026-08-10 03:10:58 +00:00
EX Engine
e04a3bace9
fix: fail-fast on ix_bridge failure + probe script for real machine
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1. ix_bridge.py: RuntimeError instead of silent PyTorch fallback
If JIT compile fails, crash immediately with diagnostic message.
0 score with no error log is worse than a visible crash.
2. qwen3_5.py: explicit WARNING log on import failure (not silent)
Shows exact error so we can diagnose from docker log.
3. probe_ixformer_symbols.py: definitive test for real machine
- Finds all ixformer .so files
- nm/objdump for topk_softmax C++ symbol
- Checks Python bindings
- Attempts JIT compile + link (the real test)
- Prints PASS/FAIL with next-step instructions
Run on real machine: python3 probe_ixformer_symbols.py
2026-08-10 03:04:50 +00:00
EX Engine
d21b2505bb
fix: wire MoE topk via ixformer C++ bridge + disable broken flash_qla GDN
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Two call chain breaks fixed:
1. MoE routing (2304 calls/token):
BEFORE: torch.softmax + torch.topk (3 Python GPU ops, no ixformer)
AFTER: ix_bridge.py → ix_moe_bridge.cpp → ixformer::infer::topk_softmax()
Source: upstream_ref/xllm/xllm/core/kernels/ilu/fused_moe.cpp line 46
The C++ API exists in base image SDK (ixformer.h declares it),
only the Python binding (ixformer.functions) was missing.
2. GDN prefill (4 layers, 99.98% NaN):
BEFORE: flash_qla SM70 kernel → abs mean=inf → nan_to_num → zeros
AFTER: skip flash_qla, use _pytorch_forward directly
Source: upstream_ref/xllm qwen3_gated_delta_net_base.cpp uses
identical PyTorch chunked logic (no flash_qla).
Sub168 (working build) never deployed flash_qla either.
Files:
- ex_engine/csrc/ix_moe_bridge.cpp: torch C++ extension calling ixformer C++ API
- ex_engine/python/ix_bridge.py: JIT-compile loader with PyTorch fallback
- qwen3_5.py: import ix_bridge for MoE, disable flash_qla for GDN
- patch_ops.sh: deploy ix_bridge .cpp + .py into vllm model dir
2026-08-10 03:00:35 +00:00
EX Engine
8e6adf20e6
refactor(EX): upstream-aligned kernels + FlashQLA GDN backend
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Major changes based on upstream_ref analysis:
1. factor_moe_topk_softmax.cu v2.0: Rewritten using ds_vllm/TRT-LLM
warp shuffle pattern (from topk_softmax_kernels.cu). Key differences:
- Zero shared memory (all butterfly __shfl_xor_sync)
- VPT=2, THREADS_PER_ROW=32 (1 warp per token row)
- 4 warps per CTA (4 tokens per block)
- Iterative argmax with winner suppression for top-K
- NaN/Inf clamping to 0 (prevents duplicate expert IDs)
2. GDN: FlashQLA backend (PROVEN on real BI-V100):
- Compiles with corex clang/16 --cuda-gpu-arch=ivcore10
- Real test: NaN=False on gdn_forward(B=1, T=64, H=4, K=128)
- Replaces custom factor_gdn_chunk_fwd.cu (archived to .ref)
- patch_model.py now JIT-loads FlashQLA extension at runtime
3. build.sh: Correct corex flags from real compile log:
--cuda-gpu-arch=ivcore10 (NOT sm_70)
-D__ILUVATAR__ -D__ILUVATAR_WORKAROUND__ -D__ILUVATAR_DIAG__
-cl-single-precision-constant -mllvm --bonus-inst-threshold=0
Key insight from xllm/kernels/ilu/ixformer.h:
ixformer::infer::topk_softmax() EXISTS at C++ level but Python
ixformer.functions binding is missing. Our .so factor bypasses
the missing Python binding entirely via dlopen/ctypes.
2026-08-10 02:55:58 +00:00
EX Engine
b75965d4ea
fix(EX): corex ivcore10 build flags + deploy pipeline + topk kernel cleanup
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Real machine log (2d5232c
2026-08-10 02:31:55 +00:00
EX Engine
fcfb764560
feat(EX): Algorithm Factor Replacement Engine — dlopen-based CUDA kernel dispatch
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Factors: 0 (moe_topk_softmax), 2 (moe_fused_gemm), 5 (gdn_chunk_fwd)
Fixes: topk_softmax fallback (2304x/token), GDN NaN (frac=0.9998-1.0)
2026-08-10 02:25:23 +00:00
