project6-dev a54dbda3bb fix(bridge): link against libixformer.so for silu_and_mul symbol ...

- ix_bridge.py: auto-discover ixformer .so files, pass as extra_ldflags
- ix_moe_bridge.cpp: fix mangled header from bad sed, add #include <optional>
- verify_single_gpu.py: also pass extra_ldflags during JIT compile

The undefined symbol _ZN8ixformer5infer12silu_and_mulERN2at6TensorES3_
lives in libixformer.so — need to explicitly link it.

2026-08-10 06:29:11 +00:00

..

__init__.py

feat(EX): Algorithm Factor Replacement Engine — dlopen-based CUDA kernel dispatch

2026-08-10 02:25:23 +00:00

corex_fa2.py

refactor(corex): rewrite 3 dlopen modules to use real ixformer::infer dispatch chain

2026-08-10 06:16:39 +00:00

corex_gdn.py

refactor(corex): rewrite 3 dlopen modules to use real ixformer::infer dispatch chain

2026-08-10 06:16:39 +00:00

corex_moe.py

refactor(corex): rewrite 3 dlopen modules to use real ixformer::infer dispatch chain

2026-08-10 06:16:39 +00:00

ex_loader.py

fix(EX): corex ivcore10 build flags + deploy pipeline + topk kernel cleanup

2026-08-10 02:31:55 +00:00

ix_bridge.py

fix(bridge): link against libixformer.so for silu_and_mul symbol

2026-08-10 06:29:11 +00:00

moe_topk.py

feat(EX): wire xllm CUB topk_softmax kernel into MoE routing

2026-08-10 03:10:58 +00:00

patch_model.py

refactor(EX): upstream-aligned kernels + FlashQLA GDN backend

2026-08-10 02:55:58 +00:00