14 Commits

Author SHA1 Message Date
root
8842a5ffef [fix] baseline5 1.8192->4096 solve oom 2. bridge.linear 导过去 2026-08-20 06:33:38 +00:00
root
f7352fa03f [fix] args num 2026-08-19 14:01:25 +00:00
root
9a52068533 [fix] baseline5 fused_add_rms_norm 确实是参数数量不匹配。rms_norm 则是参数数量对了但结果没写回去。两个 bug 叠加导致模型输出全损坏 2026-08-19 09:57:51 +00:00
root
ab078989da [fix] reshape_paged_cache slot_mapping int64→int32 (C++ data_ptr<int>要求) 2026-08-18 07:41:38 +00:00
root
9e1df1482e [fix] xllm_ops 5处C++参数签名 2026-08-18 07:10:18 +00:00
root
c92135111e [fix] reshape_paged_cache参数顺序 2026-08-18 06:44:01 +00:00
root
b89bd3d72f [fix] ix_moe_bridge pybind名无ix_前缀: ix_paged_attention→paged_attention, ix_linear→linear 2026-08-18 06:14:15 +00:00
root
54a9b572af [fix] xllm_ops 7处函数名匹配.so真实导出符号
- reshape_and_cache → reshape_paged_cache (xllm_cache.so)
- residual_rms_norm → fused_add_rms_norm (xllm_norm.so)
- topk_softmax → moe_fused_topk (xllm_moe.so)
- moe_compute_token_index → moe_compute_index (xllm_moe.so)
- ix_full_bridge → ix_moe_bridge (paged_attention, ix_linear)
- ix_linear 5参数 → 3参数 (input, weight, bias)
- check_all: ix_moe_bridge改为required, ix_full_bridge改为optional
2026-08-18 06:11:03 +00:00
root
fccb78df09 Merge branch 'main' of https://dev.modelhub.org.cn/dylanyunlong/project_6 into main 2026-08-18 04:17:58 +00:00
root
8cc6a91b8a [fix] baseline4 use ix_moe_bridge.so instead of broken ix_full_bridge.so 2026-08-18 04:17:37 +00:00
root
13b12aac4c [fix] baseline4 rms_norm crash 2026-08-18 03:35:26 +00:00
root
96ef5f27d3 [fix] baseline4 debug info 2026-08-18 02:20:43 +00:00
Claude
f7b1b2d119 fix: patched_reshape_and_cache signature 7→8 args (k_scale, v_scale)
Original vllm ops.reshape_and_cache passes 8 args:
  key, value, key_cache, value_cache, slot_mapping, kv_cache_dtype, k_scale, v_scale
Our patch had 7 (single kv_scale) → TypeError on first request → engine dead.
2026-08-17 18:10:52 +00:00
root
1af45de371 [fix] baseline4 docker build move ex_engine into qwen3_6_scripts, remove COPY ex_engine from Dockerfile 2026-08-17 11:51:01 +00:00