fix(GDN): force fp16 cast before norm+out_proj — ixformer matmul requires kHalf
matmul.cu:149 'Expected input.dtype() == kHalf' error in competition log. Root cause: _torch_chunk_gated_delta_rule returns fp32 core_out, passed directly to self.norm() → self.out_proj() which calls ixformer matmul. Fix: explicit .to(torch.float16) on core_out and z before norm.
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@@ -737,6 +737,9 @@ class GatedDeltaNet(nn.Module):
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# Gate + norm + output proj
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z = z_all[s:e].reshape(seq_len, local_num_v, self.head_v_dim)
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core_out = core_out.reshape(seq_len, local_num_v, self.head_v_dim)
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# Force fp16 — ixformer matmul requires kHalf
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core_out = core_out.to(torch.float16)
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z = z.to(torch.float16)
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normed = self.norm(
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core_out.reshape(-1, self.head_v_dim),
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z.reshape(-1, self.head_v_dim))
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