Commit Graph

279 Commits

Author SHA1 Message Date
Angazenn
a970b27e2d [WIP][Perf]remove unnecessary padding before MLA V1 prefill (#917)
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### What this PR does / why we need it?
Currently, the implementation for MLA V1 pads q, k, v to `head_dim` 256
to conform to early MLA kernel. But the new MLA kernel supports
`head_dim` that can't be devided by 128. Therefore we can remove those
unnecessary paddings to boost the performance

### Does this PR introduce _any_ user-facing change?
No.

### How was this patch tested?
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CI passed with new added/existing test.
If it was tested in a way different from regular unit tests, please
clarify how you tested step by step, ideally copy and paste-able, so
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Signed-off-by: angazenn <zengyanjia@huawei.com>
Co-authored-by: angazenn <zengyanjia@huawei.com>
2025-05-23 14:14:06 +08:00
ttanzhiqiang
dc6172efd3 update attention nz and mla nz(Improve TPOP 6ms performance) (#909)
### What this PR does / why we need it?
Update attention nz and mla nz modules to improve TPOP 6ms performance
Convert W_UV and W_UK_T to NPU format in mla_v1.py
Convert layer.weight to NPU format in w8a8.py

Signed-off-by: ttanzhiqiang <389825161@qq.com>
2025-05-23 10:18:10 +08:00
Jade Zheng
7153d8890b [Feature] Impl v1 disaggregated prefill in ascend scheduler (#852)
Implement save kv cache logic for v1 disaggregated prefill in ascend
scheduler

This PR adds support for saving kv cache in the ascend scheduler, which
is part of the v1 disaggregated prefill design. The load functionality
is not yet implemented.

Signed-off-by: Jade Zheng <zheng.shoujian@outlook.com>
2025-05-23 10:15:29 +08:00
rjg-lyh
b434f37b46 [V1] Revert the default value of enable_chunked_prefill in additional… (#935)
### What this PR does / why we need it?
Revert the default value of enable_chunked_prefill to 'False' in
additional_scheduler_config. In engine v1, enable_chunked_prefill is
forcibly set to True in VllmConfig, which causes it to be perceived as
True in check_and_update_config(). As a result, when the v0 scheduler is
enabled, the chunked prefill feature remains active, leading to the
failure of the v0 scheduler and causing it to fall back to the native v1
scheduling logic.

### Does this PR introduce _any_ user-facing change?
No.

### How was this patch tested?
CI passed with new added/existing test.

Signed-off-by: rjg-lyh <1318825571@qq.com>
2025-05-23 10:06:50 +08:00
yangpuPKU
46df67a5e9 [bugfix] Improve log level and info for custom ops build (#937)
### What this PR does / why we need it?
Fix the bug of #703, where vllm wrong raised the ERROR : Failed to
import vllm_ascend_C:No module named 'vllm_ascend.vllm_ascend_C'. The
format for reporting import vllm_ascend_C failure is unified by warning
("Failed to import vllm_ascend_C:%s", e).

### Does this PR introduce _any_ user-facing change?
No

---------

Signed-off-by: yangpuPKU <604425840@qq.com>
2025-05-23 10:05:57 +08:00
yupeng
8ddc0a1002 [DOC] mark v1 multi-lora functional (#932)
### What this PR does / why we need it?
Update feature support for lora

### Does this PR introduce _any_ user-facing change?

no

### How was this patch tested?
preview

Signed-off-by: paulyu <paulyu0307@gmail.com>
Co-authored-by: paulyu <paulyu0307@gmail.com>
2025-05-22 19:53:14 +08:00
yupeng
0f53b138f6 [V1][LoRA][Test] V1 Engine LoRA support & e2e test (#893)
### What this PR does / why we need it?

Add V1Engine LoRA support.
Add LoRA e2e test on single card and multiple cards.

### Does this PR introduce _any_ user-facing change?
support lora for V1

### How was this patch tested?

CI passed with new added test

---------

Signed-off-by: jesse <szxfml@gmail.com>
Signed-off-by: paulyu <paulyu0307@gmail.com>
Signed-off-by: paulyu12 <507435917@qq.com>
Co-authored-by: jesse <szxfml@gmail.com>
Co-authored-by: paulyu <paulyu0307@gmail.com>
2025-05-22 19:20:51 +08:00
Mengqing Cao
7aa4f85f10 [Bugfix][kvcache] revert multiple kv cache groups (#923)
Revert multiple kv cache groups related changes as this feature is
reverted in vllm https://github.com/vllm-project/vllm/pull/18459

---------

Signed-off-by: MengqingCao <cmq0113@163.com>
2025-05-22 15:15:33 +08:00
rjg-lyh
b4d6672d01 [BugFix] Fix chunked prefill bugs in engine v1 (#844)
### What this PR does / why we need it?
Fix the bugs when run deepseek model in engine v1.

### Does this PR introduce _any_ user-facing change?
No.

### How was this patch tested?
CI passed with new added/existing test.

---------

Signed-off-by: rjg-lyh <1318825571@qq.com>
2025-05-22 10:33:50 +08:00
yiz-liu
a73bd6caf4 [Fix] Set div_mode to False and fix view_as position (#912)
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### What this PR does / why we need it?
<!--
- Please clarify what changes you are proposing. The purpose of this
section is to outline the changes and how this PR fixes the issue.
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- Please clarify why the changes are needed. For instance, the use case
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Set div_mode to False to use the ACLNN kernel, which is crucial when
using ACL Graph.

### Does this PR introduce _any_ user-facing change?
<!--
Note that it means *any* user-facing change including all aspects such
as API, interface or other behavior changes.
Documentation-only updates are not considered user-facing changes.
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### How was this patch tested?
<!--
CI passed with new added/existing test.
If it was tested in a way different from regular unit tests, please
clarify how you tested step by step, ideally copy and paste-able, so
that other reviewers can test and check, and descendants can verify in
the future.
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why it was difficult to add.
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Signed-off-by: Yizhou Liu <liu_yizhou@outlook.com>
2025-05-22 09:57:25 +08:00
hfadzxy
58b413752b [Doc] Support XLM-RoBERTa-based and MiniCPM3 model (#820)
### What this PR does / why we need it?
support XLM-RoBERTa-based and MiniCPM3 model

---------

Signed-off-by: hfadzxy <starmoon_zhang@163.com>
2025-05-21 15:44:54 +08:00
22dimensions
d5401a08be [DOC] update modelslim version (#908)
1. update modelslim version to fix deepseek related issues
2. add note for "--quantization ascend"

Signed-off-by: 22dimensions <waitingwind@foxmail.com>
2025-05-21 09:12:02 +08:00
Wan_Danfeng
5cf9ff18e9 [Performance]: Custom AscendC Kernel of Multi-Step Prepare Input (#814)
### What this PR does / why we need it?

- According to https://github.com/vllm-project/vllm-ascend/issues/807,
we pull request for customer ascendc kernel of multi-step.
- also a bug we found in multi_step_runner.py is fixed when we use
multi-step on V0 Engine.


### Does this PR introduce _any_ user-facing change?

no user-facing change


### How was this patch tested?
we add Unit Test file and offline inference file to test the custom
ascendc kernel. See test/ops/test_multi_step.py and
examples/offline_multi_step.py

---------

Signed-off-by: wan_danfeng <wonderful199082@126.com>
2025-05-20 09:31:30 +08:00
22dimensions
00e0243561 enable online serving quantization (#877)
For online serving, "ascend" quantization method is not a choice
natively, so we need to add "ascend" quantization method to quantization
methods list and the user can enable quantization using "vllm serve
--quantization ascend" command.

---------

Signed-off-by: 22dimensions <waitingwind@foxmail.com>
2025-05-17 17:36:04 +08:00
22dimensions
a8730e7a3c [Doc] update quantization docs with QwQ-32B-W8A8 example (#835)
1. replace deepseek-v2-lite model with more pratical model QwQ 32B
2. fix some incorrect commands
3. replase modelslim version with a more formal tag

Signed-off-by: 22dimensions <waitingwind@foxmail.com>
2025-05-17 15:25:17 +08:00
wangxiyuan
7326644513 [CI] Fix qwen2.5 vl CI failure (#888)
The [vllm
commit](67da5720d4)
changed the input and rotary position embedding for qwen 2.5 vl which
break CI. This PR fix the CI failure for qwen2.5 vl in quick

Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
2025-05-17 05:13:32 +08:00
Mengqing Cao
df16c4f2bc [CI/UT] Ignore vllm/tests/test_vllm_port.py (#887)
Ignore `vllm/tests/test_vllm_port.py` in ut as no related to
vllm-ascend, and it is breaking CI

Signed-off-by: MengqingCao <cmq0113@163.com>
2025-05-16 18:52:59 +08:00
Mengqing Cao
7a325b2e2d [Bugfix][Model] Fix fusedmoe and make modelrunner_v1 compatible with latest vllm (#867)
### What this PR does / why we need it?
this PR fix CI failure broken by vllm.
1. add moe_config for fused_moe
2. adjust the change for kv cache group from vllm. currently vllm-ascend
doesn't support this feature. this is just a quick fix for backward
compatibility

fix: #872

---------

Signed-off-by: MengqingCao <cmq0113@163.com>
2025-05-16 12:14:55 +08:00
hfadzxy
fd515cd60b [Doc][BugFix]Fix Release Compatibility Matrix (#865)
### What this PR does / why we need it?
Fix Release Compatibility Matrix

Signed-off-by: hfadzxy <starmoon_zhang@163.com>
2025-05-15 15:38:38 +08:00
Angazenn
1e67089bc9 [BugFix]add all2all when dp_size > 1 && downgrade npu_dequant_swiglu_quant (#819)
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BEFORE SUBMITTING, PLEASE READ
https://docs.vllm.ai/en/latest/contributing/overview.html

-->
### What this PR does / why we need it?
1. This PR introduces native `all_to_all` communication operator to fix
`allgather` bugs when dp_size > 1. Besides, it adds a naive
implementation of force-load-balance when doing profile runs.
2. The operator `npu_dequant_swiglu_quant` only supports input
hidden_states with dtype `torch.int32`. This tensor occupies space of
`global_bs * seq_len * topk * hidden_size`, which might be very large as
`ep_size` grows. Therefore we need to disable this operator and use
original `swiglu` && `quantize`.

### Does this PR introduce _any_ user-facing change?
No.

### How was this patch tested?
By performing offline inference:

![image](https://github.com/user-attachments/assets/e003d5dc-0753-41ae-9303-e87f73ac6828)

---------

Signed-off-by: angazenn <zengyanjia@huawei.com>
Co-authored-by: angazenn <zengyanjia@huawei.com>
2025-05-15 09:19:55 +08:00
wangxiyuan
68fb63428b [CI] Patch torch.library.infer_schema for fused moe ops to fix CI (#854)
make sure pytorch infer_schema check is patched before some case which
using fused moe ops:
1. model register
2. quantization loading
3. fused moe ut

Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
2025-05-14 19:49:09 +08:00
Yikun Jiang
508242425c [CI][1/N] Add basic ci for PD disaggregation (#830)
### What this PR does / why we need it?
Add basic CI for PD disaggregation, and enable it when schedule and
label with `module:pd`

- Updated `.github/actionlint.yaml` to add a new self-hosted runner
configuration: `linux-arm64-npu-static-8`.
- Introduced a new GitHub Actions workflow
`.github/workflows/vllm_ascend_test_pd.yaml` for PD disaggregation
testing:
- Scheduled to run daily at 23:00 UTC and triggered by pull request
label `module:pd`.
- Added steps for baisci installation and other steps will add in
followup PR

Related: https://github.com/vllm-project/vllm-ascend/issues/841

### Does this PR introduce _any_ user-facing change?
No

### How was this patch tested?
- CI passed
- No trigger by default
<img width="847" alt="image"
src="https://github.com/user-attachments/assets/23aa128f-526d-447f-91c8-8ebf6be8400f"
/>
- Trigger only if we tag with pd
<img width="930" alt="image"
src="https://github.com/user-attachments/assets/aef1caca-2029-48e8-a6e6-860136adcd37"
/>

Signed-off-by: Yikun Jiang <yikunkero@gmail.com>
2025-05-14 18:04:16 +08:00
Yikun Jiang
59e02502b1 [CI] Add e2e test frame work and doctest (#730)
### What this PR does / why we need it?
Add quickstart doctest CI

### Does this PR introduce _any_ user-facing change?
no

### How was this patch tested?
- CI passed
- Run `/vllm-ascend/tests/e2e/run_doctests.sh`
Related: https://github.com/vllm-project/vllm-ascend/issues/725

Signed-off-by: Yikun Jiang <yikunkero@gmail.com>
2025-05-14 09:27:54 +08:00
wangxiyuan
857f489cbf [CI] Patch torch.library.infer_schema for torch 2.5 backward compatibility (#837)
Patch torch.library.infer_schema for torch 2.5 backward compatibility

- Introduced a new module `patch_utils` under
`vllm_ascend/patch/worker/patch_common/`.
- Added a function `ascend_direct_register_custom_op` to handle custom
operator registration with backward compatibility for PyTorch < 2.7
(such as torch 2.5.1).
- Implemented type conversion logic for annotations to ensure
compatibility across different PyTorch versions.
- Registered the function `ascend_direct_register_custom_op` to
`utils.direct_register_custom_op`.

- Updated `__init__.py` to include `patch_utils` as the first import.
- Ensured `patch_utils` is available for use in other patch files and
skipped isort checks for `patch_utils` import.

Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
2025-05-14 09:20:55 +08:00
cxcxflying
e564470338 [Attention][Kernel]moe support for llama4 and mllama4 (#740)
### What this PR does / why we need it?
moe support for llama4 and mllama4 in vllm-ascend

### Does this PR introduce _any_ user-facing change?
no
### How was this patch tested?
start sever:
python -m vllm.entrypoints.openai.api_server --model
/data/nfs/benchmark/tokenizer/Llama-4-Scout-17B-16E-Instruct \
--max-num-seqs=256 \
--max-model-len=8192 \
--tensor-parallel-size=8 \
--block-size=128 \
--dtype bfloat16 \
--host=0.0.0.0 \
--port=8000 \
--gpu-memory-utilization=0.9 \
--trust-remote-code

client:
python online_server.py --model-path
/data/nfs/benchmark/tokenizer/Llama-4-Scout-17B-16E-Instruct
--image-path /data/nfs/w60040464/cherry_blossom.jpg --docker-ip
7.242.108.253 --served-port 8000 --text "what is the content of this
image?"

result:
{'id': 'chatcmpl-2b709a5d2e1a4017991ec4ba8248686a', 'object':
'chat.completion', 'created': 1747056823, 'model':
'/data/nfs/benchmark/tokenizer/Llama-4-Scout-17B-16E-Instruct',
'choices': [{'index': 0, 'message': {'role': 'assistant',
'reasoning_content': None, 'content': 'The image depicts a tower, likely
Tokyo Skytree, framed by branches of a cherry blossom tree. The tower is
white and has a distinctive shape, with a large sphere at the top and a
long, thin spire extending from it. The branches of the cherry blossom
tree are in the foreground, with pink flowers blooming on them. The
background is a clear blue sky.\n\n**Key Features:**\n\n* **Tower:**
White, spherical shape at the top, long thin spire\n', 'tool_calls':
[]}, 'logprobs': None, 'finish_reason': 'length', 'stop_reason': None}],
'usage': {'prompt_tokens': 2340, 'total_tokens': 2440,
'completion_tokens': 100, 'prompt_tokens_details': None},
'prompt_logprobs': None}

Signed-off-by: chenxu <chenxu68@huawei.com>
Co-authored-by: chenxu <chenxu68@huawei.com>
Co-authored-by: evian <eviantai@u.nus.edu>
2025-05-13 19:12:40 +08:00
hfadzxy
217211d8a3 [Misc][Doc] Add the latest stable release url (#826)
### What this PR does / why we need it?
 Add the latest stable release url

Signed-off-by: hfadzxy <starmoon_zhang@163.com>
2025-05-13 12:53:23 +08:00
rjg-lyh
c6ac399091 [Bugfix] Fix the method of importing environment variables in DeepSee… (#817)
### What this PR does / why we need it?
Fix the method of importing environment variables in DeepSeek model to
support successful compilation via aclgraph.

Signed-off-by: rjg-lyh <1318825571@qq.com>
2025-05-13 12:52:30 +08:00
wangxiyuan
6193ba679b [CI] add codespell CI and fix format.sh (#827)
1. Fix format check error to make format.sh work
2. Add codespell check CI 
3. Add the missing required package for vllm-ascend.

Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
2025-05-12 22:04:48 +08:00
whx
5998704c08 [BugFix] Fix ascend scheduler bugs. (#822)
This PR fixes two bugs in AscendScheduler:
1. When running with high concurrency, the length of running queue may
exceed the limit of max_num_seqs
2. When some requests are prempted and recomputing is activated, the
logic of computing new tokens is wrong.

Signed-off-by: whx-sjtu <2952154980@qq.com>
2025-05-12 21:15:17 +08:00
yiz-liu
701b0fd95e [Enhancement] Add padding for ACL Graph (#803)
### What this PR does / why we need it?
Add padding for ACL Graph and refactor graph batch size adjustments to
utils.py

---------

Signed-off-by: Yizhou Liu <liu_yizhou@outlook.com>
2025-05-12 20:26:22 +08:00
NeverRaR
efabd722eb feat: support torchair graph mode in v1 engine (#789)
### What this PR does / why we need it?
support torchair graph mode with v1 engine

---------

Signed-off-by: boying <897013703@qq.com>
2025-05-12 19:14:07 +08:00
hfadzxy
4a2505f81f [accuracy test]Update cann version and huggingface-hub version for Qwen3 (#823)
### What this PR does / why we need it?
1.  update cann version to 8.1.0 for multimodal
2.  fix huggingface-hub version to adapt to qwen3
3.  change Qwen3-8B to Qwen-8B-Base,

Signed-off-by: hfadzxy <starmoon_zhang@163.com>
2025-05-12 19:12:48 +08:00
yiz-liu
5305a2ccf9 [Bugfix] Tweak distributed process group initialization and add dummy… (#816)
fix batch execution method to enable DP in V1

Signed-off-by: Yizhou Liu <liu_yizhou@outlook.com>
2025-05-12 17:31:29 +08:00
Li Wang
4df1e99614 [CI] Re-enable vllm-empty/tests/benchmarks (#812)
### What this PR does / why we need it?
For the
[#17962](https://github.com/vllm-project/vllm/pull/17962?notification_referrer_id=NT_kwDOCexQHLUxNjM0MTM3OTEwNDoxNjY0ODE5NDg#event-17608938997)
has merged, vllm openapi server can now launch normally on python==3.10,
we re-enable the related tests

Signed-off-by: wangli <wangli858794774@gmail.com>
2025-05-12 15:50:48 +08:00
Li Wang
8e4e791fcd [CI] Add deepseek-v2-lite test (#631)
### What this PR does / why we need it?
Add deepseek-v2-lite test, part of #499 
---------

Signed-off-by: wangli <wangli858794774@gmail.com>
2025-05-12 14:59:17 +08:00
Li Wang
cdece86f2c [Bugfix] Add max_num_batched_tokens to InputBatch to make main CI pass (#806)
### What this PR does / why we need it?

1. Fix V1 error found by
[nightly_ci](https://github.com/vllm-project/vllm-ascend/actions/runs/14950004754/job/41998136610),
broken by [[v1] Pass BlockTable and KVCacheSpec to
AttentionMetadataBuilders
#17483](https://github.com/vllm-project/vllm/pull/17483), make
`InputBatch` parameter consistent with vllm.
2. Disable benmark and fix it in upstream.

### Does this PR introduce _any_ user-facing change?

No


### How was this patch tested?

CI passed

---------

Signed-off-by: wangli <wangli858794774@gmail.com>
Signed-off-by: Yikun Jiang <yikunkero@gmail.com>
Co-authored-by: Yikun Jiang <yikunkero@gmail.com>
2025-05-12 00:36:56 +08:00
Li Wang
218f21de21 [Benchmarks] Add qwen2.5-7b test (#763)
### What this PR does / why we need it?
- Add qwen2.5-7b test
- Optimize the documentation to be more developer-friendly 

Signed-off-by: xuedinge233 <damow890@gmail.com>
Co-authored-by: xuedinge233 <damow890@gmail.com>
2025-05-10 09:47:42 +08:00
wemaster
19c8e134e4 [CI/UT] fix spec ut in vllm-ascend main and vllm main (#759)
### What this PR does / why we need it?
#### 1. fix spec ut in vllm-ascend main and vllm main
As https://github.com/vllm-project/vllm-ascend/pull/694 and
https://github.com/vllm-project/vllm-ascend/pull/749 verify, Now,
vllm-ascend main and vllm 0.8.5, spec UT is happy, but vllm-ascend main
and vllm main, CI is fail.

I found the reason is a triton bug
https://github.com/triton-lang/triton/issues/2266, but i I didn't figure
it out that why the bug did not effect vllm-ascend main and vllm 0.8.5,
maybe the usage of triton have changed when vllm 0.8.5 to latest main

As the bug describe, I changed the minimum block_size in UT from 8 to
16, and the modification is verified locally to be effective.

#### 2. modify some case skip form.
I modified some commented out cases to skipif form, which is more
standardized.

### Does this PR introduce _any_ user-facing change?
None

### How was this patch tested?
CI

Signed-off-by: mengwei805 <mengwei25@huawei.com>
2025-05-10 09:45:56 +08:00
Li Wang
58d2f85c4a [CI] Fix schedule trigger bug (#757)
### What this PR does / why we need it?
This PR aims to fix nightly ci
[broken](https://github.com/vllm-project/vllm-ascend/actions/runs/14848150987)
We have a workflow containing multiple triggers:

- push events (to the default branch)
- pull requests (against the default branch)
- scheduled events
Our paths-filter action works great for the first two use-cases,
detecting the context and base to compare against. However, it fails for
scheduled events giving the error `This action requires 'base' input to
be configured or 'repository.default_branch' to be set in the event
payload.`
For the scheduling trigger event, we choose to skip this filter
because we don't need its results:
```
      - name: Check for changes in Speculative Decode
        if: github.event_name != 'schedule'
```

Signed-off-by: wangli <wangli858794774@gmail.com>
2025-05-10 09:45:07 +08:00
Yikun Jiang
804ebb17bd [Doc] Move Release Compatibility Matrix to top and remove v0.7.x rc info (#799)
### What this PR does / why we need it?
- Move Release Compatibility Matrix to top 
- Remove v0.7.x rc info because v0.7.3 final release alread published
- Rename vllm-ascend to vLLM Ascend

### Does this PR introduce _any_ user-facing change?
No

### How was this patch tested?
Preview

Signed-off-by: Yikun Jiang <yikunkero@gmail.com>
2025-05-09 16:41:50 +08:00
rjg-lyh
fa99f89e93 [Core] Support the features of prefix cache and chunked prefill in v0/v1 (#782)
### What this PR does / why we need it?
Support the features of prefix cache and chunked prefill in v0/v1.

---------

Signed-off-by: rjg-lyh <1318825571@qq.com>
2025-05-09 16:39:28 +08:00
ApsarasX
324f819b92 [Perf] Optimize fused_experts quantization code to save npu memory (#784)
### What this PR does / why we need it?
In the w8a8 quantization code of `fused_experts`, the output of almost
every operator is assigned a new variable name. If we want to save NPU
memory, we manually `del` these variables to end their lifecycle, which
fills the code with `del` statements and looks inelegant.
Therefore, I plan to names the output of most operators as
`hidden_states`, thereby ending the lifecycle of the previous
`hidden_states`.

### Does this PR introduce _any_ user-facing change?
No

### How was this patch tested?

Signed-off-by: ApsarasX <apsarax@outlook.com>
2025-05-09 15:09:37 +08:00
Jade Zheng
2c685e3b61 [Bugfix] Correct method call for _set_cos_sin_cache (#774)
This change ensures proper functionality for longer sequences by
correctly invoking the _set_cos_sin_cache method with self as the first
argument.

For example, with DeepSeek R1, if this change isn't made, the program
will crash when the input sequence exceeds 4096.

Signed-off-by: Jade Zheng <zheng.shoujian@outlook.com>
2025-05-09 12:55:57 +08:00
zzzzwwjj
5301649108 [Doc] Add notes for OOM in FAQs (#786)
### What this PR does / why we need it?
add notes for OOM in faqs.

### Does this PR introduce _any_ user-facing change?
No

### How was this patch tested?
CI passed

---------

Signed-off-by: zzzzwwjj <1183291235@qq.com>
Signed-off-by: Yikun Jiang <yikunkero@gmail.com>
Co-authored-by: Yikun Jiang <yikunkero@gmail.com>
2025-05-08 16:28:29 +08:00
chris668899
6c020883a8 [WIP]Add Func: aclgraph_batch_size auto-adjust to different model (#771)
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BEFORE SUBMITTING, PLEASE READ
https://docs.vllm.ai/en/latest/contributing/overview.html

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### What this PR does / why we need it?
This PR add new function of : aclgraph_batch_size can dynamic adjust to
different model; before this PR, the aclgraph_batch_sizes given from
vllm to vllm-ascend always too large, and that may result in ERROR while
running on different, with the information: "The resources are
insufficient".
Now, with this PR, the code can dynamic adjust aclgraph_batch_sizes
depend on the model hidden_layer_nums and parallel config, for example:
a. for Qwen2.5-7B, the aclgraph_batch_size length is 33 total;
b. for Qwen2.5-72B, the aclgraph_batch_size length is 11 total;

Signed-off-by: chris668899 <15105191595@126.com>
2025-05-08 16:23:33 +08:00
yiz-liu
2e3520e285 [Bugfix] Fix output tensor shape in vanilla_chunked_prefill and update import paths for model_loader (#773)
<!--  Thanks for sending a pull request!

BEFORE SUBMITTING, PLEASE READ
https://docs.vllm.ai/en/latest/contributing/overview.html

-->
### What this PR does / why we need it?
<!--
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section is to outline the changes and how this PR fixes the issue.
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reviews in your PR.

- Please clarify why the changes are needed. For instance, the use case
and bug description.

- Fixes #
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Fix output tensor shape in vanilla_chunked_prefill function.

### Does this PR introduce _any_ user-facing change?
<!--
Note that it means *any* user-facing change including all aspects such
as API, interface or other behavior changes.
Documentation-only updates are not considered user-facing changes.
-->
None.

### How was this patch tested?
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why it was difficult to add.
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Run offline inference on DeepSeek models.

---------

Signed-off-by: Yizhou Liu <liu_yizhou@outlook.com>
2025-05-08 14:19:26 +08:00
Yikun Jiang
ec27af346a [Doc] Add 0.8.5rc1 release note (#756)
### What this PR does / why we need it?
Add 0.8.5rc1 release note and bump vllm version to v0.8.5.post1

### Does this PR introduce _any_ user-facing change?
No

### How was this patch tested?

CI passed

---------

Signed-off-by: Yikun Jiang <yikunkero@gmail.com>
2025-05-06 23:46:35 +08:00
linfeng-yuan
2cd036ee8e [Bugfix] fix accuracy problem for quantized deepseek models (#768)
### What this PR does / why we need it?

The root cause of the bug is that numerical computations involving NaNs
cannot eliminate them. We addressed it by using `masked_fill_` to
eliminate NaNs while avoiding memory-wasting `torch.where` approach.

### Does this PR introduce _any_ user-facing change?
No

### How was this patch tested?
This patch was tested with vllm v0.8.5 and vllm-ascend master. I run
deepseek_v3 model with offline inference scripts
(examples/dp_offline/run_dp.sh & data_parallel.py).

Signed-off-by: linfeng-yuan <1102311262@qq.com>
2025-05-06 22:09:56 +08:00
ApsarasX
d6e9417652 [Bugfix] Fix masked_fill_ function typo (#769)
### What this PR does / why we need it?
Fix function name typo, make `mask_fill_` to `masked_fill_`

### Does this PR introduce _any_ user-facing change?
No

### How was this patch tested?
CI passed

Signed-off-by: ApsarasX <apsarax@outlook.com>
2025-05-06 21:54:52 +08:00
Yikun Jiang
afe1767c17 [Core] Cleanup triton patch which has been fixed in vllm (#764)
### What this PR does / why we need it?
- Revert "Re-patch TritonPlaceholder on main to make CI happy (#753)"
because upstream main CI already merged:
https://github.com/vllm-project/vllm/pull/17446
- Keep 0.8.5.post1 compatible

### Does this PR introduce _any_ user-facing change?
No

### How was this patch tested?
CI passed

---------

Signed-off-by: Yikun Jiang <yikunkero@gmail.com>
2025-05-06 18:52:15 +08:00