mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-i1-GGUF
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初始化项目，由ModelHub XC社区提供模型 Model: mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-i1-GGUF Source: Original Platform
2026-06-04 02:56:16 +08:00
version https://git-lfs.github.com/spec/v1
oid sha256:b603b70cff2a919d4b0ae931d1f597ace679abaf2c2464f760816b34582643e7
size 4437814688
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