mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-i1-GGUF
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初始化项目，由ModelHub XC社区提供模型 Model: mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-i1-GGUF Source: Original Platform
2026-06-04 02:56:16 +08:00
version https://git-lfs.github.com/spec/v1
oid sha256:208e32a071cf581e6dc11c7c3492a6a55951aeb92e9ac0829c3d12f06c73a7e3
size 3574013344
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