VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb.Q8_0.gguf at 7e7dbfb898cc721da6dee56b59e7a9df5f423adf - VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF - Gitea: Git with a cup of tea

mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF

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ModelHub XC 7e7dbfb898 初始化项目，由ModelHub XC社区提供模型

Model: mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF
Source: Original Platform

2026-05-10 02:30:17 +08:00

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	`version https://git-lfs.github.com/spec/v1`
	`oid sha256:a726412e9de9f441779026bc012b30b9721a2a6de4d0cb32fe1c27cd32169a1f`
	`size 8098526368`