VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb.Q4_K_M.gguf at 7e7dbfb898cc721da6dee56b59e7a9df5f423adf - VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF - Gitea: Git with a cup of tea

mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF

Files

ModelHub XC 7e7dbfb898 初始化项目，由ModelHub XC社区提供模型

Model: mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF
Source: Original Platform

2026-05-10 02:30:17 +08:00

4 lines

135 B

Plaintext

Raw Blame History

	`version https://git-lfs.github.com/spec/v1`
	`oid sha256:d48c9db42bc5ec3c549b690c75917f95cacc4b2d6bce2b2a200fbf4820562265`
	`size 4683074720`