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VeriReason-Qwen2.5-7b-RTLCo…/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb.Q2_K.gguf
ModelHub XC 7e7dbfb898 初始化项目,由ModelHub XC社区提供模型
Model: mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF
Source: Original Platform
2026-05-10 02:30:17 +08:00

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version https://git-lfs.github.com/spec/v1
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