mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF
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初始化项目，由ModelHub XC社区提供模型 Model: mradermacher/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF Source: Original Platform
2026-05-10 02:30:17 +08:00
version https://git-lfs.github.com/spec/v1
oid sha256:54edccb060a62111364c9e4af1d22f79772ac796379dfaeeaf4bb9b64383fb2b
size 4088460448
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