mradermacher/VeriReason-Qwen2.5-1.5b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF
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初始化项目，由ModelHub XC社区提供模型 Model: mradermacher/VeriReason-Qwen2.5-1.5b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF Source: Original Platform
2026-06-10 10:47:16 +08:00
version https://git-lfs.github.com/spec/v1
oid sha256:1e3156818cd6eed288313936269d9c10dca2b111a430d9ca7159ede021d34c9c
size 1272740800
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