Files
Qwen-2.5-Instruct-Verilog-R…/Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B.Q3_K_M.gguf
ModelHub XC be74c331a4 初始化项目,由ModelHub XC社区提供模型
Model: mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B-GGUF
Source: Original Platform
2026-05-26 02:47:15 +08:00

4 lines
135 B
Plaintext

version https://git-lfs.github.com/spec/v1
oid sha256:5fd8c3dc033509ffc291f15caf2a382824c3e0803ed50c72ccd14786156f6dfc
size 3808391648