初始化项目,由ModelHub XC社区提供模型
Model: mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B-GGUF Source: Original Platform
This commit is contained in:
3
Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B.Q5_K_S.gguf
Normal file
3
Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B.Q5_K_S.gguf
Normal file
@@ -0,0 +1,3 @@
|
||||
version https://git-lfs.github.com/spec/v1
|
||||
oid sha256:5fda457db12b4adc419da2fbdccb754bf80e19041fbea3838a117111d6ef72f1
|
||||
size 5315176928
|
||||
Reference in New Issue
Block a user