mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B-GGUF
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初始化项目，由ModelHub XC社区提供模型 Model: mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B-GGUF Source: Original Platform
2026-05-26 02:47:15 +08:00
version https://git-lfs.github.com/spec/v1
oid sha256:5c59da72606fa2ad3778f6556a99f2c840c1efb15f353643edc1662851a68816
size 6254199264
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