Qwen-2.5-Instruct-Verilog-R…/Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B.f16.gguf

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初始化项目，由ModelHub XC社区提供模型 Model: mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-v2-7B-GGUF Source: Original Platform 2026-05-26 02:47:15 +08:00			`version https://git-lfs.github.com/spec/v1`
			`oid sha256:b163b12e34a80b87238e16377f65b8cdeba329b53db25edd067f9f4817d36041`
			`size 15237853664`