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Qwen-2.5-Instruct-Verilog-R…/Qwen-2.5-Instruct-Verilog-Reasoning-7B.f16.gguf
ModelHub XC 68091e816a 初始化项目,由ModelHub XC社区提供模型
Model: mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-7B-GGUF
Source: Original Platform
2026-05-08 22:28:06 +08:00

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