mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-7B-GGUF
1
0
Fork 0
Code Issues Pull Requests Actions Projects Releases Wiki Activity
Files
68091e816aebce00aeb1af7327e164ff56e8201c
Qwen-2.5-Instruct-Verilog-R…/Qwen-2.5-Instruct-Verilog-Reasoning-7B.Q8_0.gguf

4 lines
135 B
Plaintext
Raw Normal View History

初始化项目，由ModelHub XC社区提供模型 Model: mradermacher/Qwen-2.5-Instruct-Verilog-Reasoning-7B-GGUF Source: Original Platform
2026-05-08 22:28:06 +08:00
version https://git-lfs.github.com/spec/v1
oid sha256:18075dc3da9d3b4db9d11c0916b7b7ce606414bb0e74dd28538313dbc44a4f76
size 8098525632
Reference in New Issue Copy Permalink