[init] baseline7 from project_6
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167
ex_engine/xllm_kernels/cuda/hgemm_blocktiling.cu
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167
ex_engine/xllm_kernels/cuda/hgemm_blocktiling.cu
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// hgemm_blocktiling.cu — FP16 GEMM for BI-V100
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//
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// 1:1 from siboehm/SGEMM_CUDA kernel 6 (sgemmVectorize).
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// Changes: float→__half, float4→load 4 halfs, FP32 accumulator.
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// No WARPSIZE usage. No cooperative_groups. CUDA 10.2 safe.
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#include <cuda_fp16.h>
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#include <cuda_runtime.h>
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#define CEIL_DIV(M, N) (((M) + (N)-1) / (N))
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template <const int BM, const int BN, const int BK, const int TM, const int TN>
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__global__ void hgemmVectorize(int M, int N, int K, float alpha,
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const __half *A, const __half *B,
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float beta, __half *C) {
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const uint cRow = blockIdx.y;
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const uint cCol = blockIdx.x;
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// BN/TN are the number of threads to span a column
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const int threadCol = threadIdx.x % (BN / TN);
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const int threadRow = threadIdx.x / (BN / TN);
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// allocate space for the current blocktile in smem
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// A stored transposed: As[BK][BM], B normal: Bs[BK][BN]
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__shared__ __half As[BM * BK];
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__shared__ __half Bs[BK * BN];
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// Move blocktile to beginning of A's row and B's column
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A += cRow * BM * K;
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B += cCol * BN;
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C += cRow * BM * N + cCol * BN;
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// calculating the indices that this thread will load into SMEM
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// FP16: load 4 halfs (8 bytes) per step. 4 halfs per thread.
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// siboehm: float4 = 4 floats = 128bit. We do 4 halfs = 64bit.
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const uint innerRowA = threadIdx.x / (BK / 4);
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const uint innerColA = threadIdx.x % (BK / 4);
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const uint innerRowB = threadIdx.x / (BN / 4);
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const uint innerColB = threadIdx.x % (BN / 4);
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// allocate thread-local cache for results in registerfile
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// FP32 accumulation to avoid FP16 precision loss
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float threadResults[TM * TN] = {0.0f};
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__half regM[TM];
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__half regN[TN];
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// outer-most loop over block tiles
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for (uint bkIdx = 0; bkIdx < K; bkIdx += BK) {
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// populate the SMEM caches
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// transpose A while loading it (same as siboehm)
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// Load 4 halfs from A
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__half a0 = A[innerRowA * K + innerColA * 4 + 0];
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__half a1 = A[innerRowA * K + innerColA * 4 + 1];
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__half a2 = A[innerRowA * K + innerColA * 4 + 2];
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__half a3 = A[innerRowA * K + innerColA * 4 + 3];
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As[(innerColA * 4 + 0) * BM + innerRowA] = a0;
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As[(innerColA * 4 + 1) * BM + innerRowA] = a1;
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As[(innerColA * 4 + 2) * BM + innerRowA] = a2;
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As[(innerColA * 4 + 3) * BM + innerRowA] = a3;
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// Load 4 halfs from B (no transpose)
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Bs[innerRowB * BN + innerColB * 4 + 0] = B[innerRowB * N + innerColB * 4 + 0];
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Bs[innerRowB * BN + innerColB * 4 + 1] = B[innerRowB * N + innerColB * 4 + 1];
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Bs[innerRowB * BN + innerColB * 4 + 2] = B[innerRowB * N + innerColB * 4 + 2];
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Bs[innerRowB * BN + innerColB * 4 + 3] = B[innerRowB * N + innerColB * 4 + 3];
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__syncthreads();
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// advance blocktile
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A += BK; // move BK columns to right
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B += BK * N; // move BK rows down
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// calculate per-thread results
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for (uint dotIdx = 0; dotIdx < BK; ++dotIdx) {
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// block into registers
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for (uint i = 0; i < TM; ++i) {
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regM[i] = As[dotIdx * BM + threadRow * TM + i];
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}
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for (uint i = 0; i < TN; ++i) {
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regN[i] = Bs[dotIdx * BN + threadCol * TN + i];
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}
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// FP32 accumulation
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for (uint resIdxM = 0; resIdxM < TM; ++resIdxM) {
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float aVal = __half2float(regM[resIdxM]);
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for (uint resIdxN = 0; resIdxN < TN; ++resIdxN) {
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threadResults[resIdxM * TN + resIdxN] +=
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aVal * __half2float(regN[resIdxN]);
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}
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}
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}
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__syncthreads();
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}
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// write out the results
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for (uint resIdxM = 0; resIdxM < TM; resIdxM += 1) {
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for (uint resIdxN = 0; resIdxN < TN; resIdxN += 1) {
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uint row = cRow * BM + threadRow * TM + resIdxM;
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uint col = cCol * BN + threadCol * TN + resIdxN;
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if (row < M && col < N) {
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float c_old = __half2float(C[(threadRow * TM + resIdxM) * N +
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threadCol * TN + resIdxN]);
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C[(threadRow * TM + resIdxM) * N + threadCol * TN + resIdxN] =
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__float2half(alpha * threadResults[resIdxM * TN + resIdxN] +
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beta * c_old);
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}
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}
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}
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}
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// ============================================================================
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// Launch wrapper — matches siboehm runSgemmVectorize
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// ============================================================================
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void launch_hgemm_blocktiling(
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int M, int N, int K,
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const __half* alpha_ptr,
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const __half* A, int lda,
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const __half* B, int ldb,
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const __half* beta_ptr,
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__half* C, int ldc,
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cudaStream_t stream)
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{
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constexpr int BM = 128;
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constexpr int BN = 128;
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constexpr int BK = 8;
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constexpr int TM = 8;
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constexpr int TN = 8;
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// 256 threads — same as siboehm
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constexpr int NUM_THREADS = (BM * BN) / (TM * TN);
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dim3 grid(CEIL_DIV(N, BN), CEIL_DIV(M, BM));
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dim3 block(NUM_THREADS);
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float alpha = 1.0f, beta = 0.0f;
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if (alpha_ptr) alpha = __half2float(*alpha_ptr);
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if (beta_ptr) beta = __half2float(*beta_ptr);
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hgemmVectorize<BM, BN, BK, TM, TN>
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<<<grid, block, 0, stream>>>(M, N, K, alpha, A, B, beta, C);
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}
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// ============================================================================
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// MoE expert GEMM — C++ loop over experts (replaces Python for-loop)
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// ============================================================================
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void launch_moe_expert_hgemm(
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int num_experts,
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const int* expert_counts, // host, [num_experts]
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const int* expert_offsets, // host, [num_experts]
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int N, int K,
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const __half* input, // (total_tokens, K)
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const __half* weights, // (num_experts, N, K)
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__half* output, // (total_tokens, N)
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cudaStream_t stream)
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{
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for (int e = 0; e < num_experts; e++) {
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int M_e = expert_counts[e];
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if (M_e == 0) continue;
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int off = expert_offsets[e];
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const __half* A = input + off * K;
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const __half* B = weights + (long long)e * N * K;
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__half* C_e = output + off * N;
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launch_hgemm_blocktiling(M_e, N, K,
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nullptr, A, K, B, N, nullptr, C_e, N, stream);
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}
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}
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