56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
60 lines
2.5 KiB
Plaintext
60 lines
2.5 KiB
Plaintext
// SPDX-FileCopyrightText: Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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// SPDX-License-Identifier: BSD-3-Clause
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#pragma once
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#include <cub/config.cuh>
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#if defined(_CCCL_IMPLICIT_SYSTEM_HEADER_GCC)
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# pragma GCC system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_CLANG)
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# pragma clang system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_MSVC)
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# pragma system_header
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#endif // no system header
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#include <cuda/__cmath/pow2.h>
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#include <cuda/__ptx/instructions/get_sreg.h>
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#include <cuda/std/__type_traits/integral_constant.h>
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CUB_NAMESPACE_BEGIN
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namespace detail
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{
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template <int LogicalWarpSize>
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inline constexpr bool is_valid_logical_warp_size_v = LogicalWarpSize >= 1 && LogicalWarpSize <= detail::warp_threads;
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template <int LogicalWarpSize>
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[[nodiscard]] _CCCL_DEVICE
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_CCCL_FORCEINLINE int logical_lane_id(::cuda::std::integral_constant<int, LogicalWarpSize> = {})
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{
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static_assert(is_valid_logical_warp_size_v<LogicalWarpSize>, "invalid logical warp size");
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auto lane = ::cuda::ptx::get_sreg_laneid();
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constexpr bool is_full_warp = LogicalWarpSize == detail::warp_threads;
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constexpr auto is_single_logical_warp = is_full_warp || !::cuda::is_power_of_two(LogicalWarpSize);
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auto logical_lane =
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static_cast<int>(is_single_logical_warp ? lane : (LogicalWarpSize == 1 ? 0 : lane % LogicalWarpSize));
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_CCCL_ASSUME(logical_lane >= 0 && logical_lane < LogicalWarpSize);
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return logical_lane;
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}
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template <int LogicalWarpSize>
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[[nodiscard]] _CCCL_DEVICE
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_CCCL_FORCEINLINE int logical_warp_id(::cuda::std::integral_constant<int, LogicalWarpSize> = {})
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{
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static_assert(is_valid_logical_warp_size_v<LogicalWarpSize>, "invalid logical warp size");
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auto lane = ::cuda::ptx::get_sreg_laneid();
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constexpr bool is_full_warp = LogicalWarpSize == detail::warp_threads;
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constexpr auto is_single_logical_warp = is_full_warp || !::cuda::is_power_of_two(LogicalWarpSize);
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auto logical_warp_id = static_cast<int>(is_single_logical_warp ? 0 : lane / LogicalWarpSize);
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_CCCL_ASSUME(logical_warp_id >= 0 && logical_warp_id < detail::warp_threads / LogicalWarpSize);
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return logical_warp_id;
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}
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template <int LogicalWarpSize>
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[[nodiscard]] _CCCL_DEVICE _CCCL_FORCEINLINE int
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logical_warp_base_id(::cuda::std::integral_constant<int, LogicalWarpSize> logical_warp_size = {})
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{
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return cub::detail::logical_warp_id(logical_warp_size) * LogicalWarpSize;
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}
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} // namespace detail
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CUB_NAMESPACE_END
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