5923223cba
tuning_three_way_partition.cuh: 58→99 行 - 移植 SM100 (5 entries) + SM90 (10) + SM80 (4) 共 19 条 - 按 (offset_size, input_size) 二维分派 - 三路划分 SMEM: 3 * tpb * ipt * input_size tuning_histogram.cuh: 48→76 行 - 移植 SM100 (2 entries) + SM90 (2) + default - privatized SMEM bins 保护 - 保留 CCCL benchmark 注释
77 lines
2.6 KiB
Plaintext
77 lines
2.6 KiB
Plaintext
// muh/include/muh/tuning/tuning_histogram.cuh — BI-V100
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// Full port from CCCL: SM100 (2 entries) + SM90 (2 entries) + default
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// Dispatch on: (num_channels, num_active_channels, counter_size, sample_size, is_even)
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// Histogram SMEM: num_bins * counter_size per privatized copy
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#pragma once
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#include "muh/hardware.cuh"
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#include "muh/tuning/common.cuh"
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namespace muh::tuning::histogram {
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enum class HistogramMemoryPreference { SMEM, GMEM };
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struct HistogramPolicy {
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int threads_per_block;
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int items_per_thread;
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int privatized_smem_bins;
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BlockLoadAlgorithm load_algorithm;
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CacheLoadModifier load_modifier;
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bool rle_compress;
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HistogramMemoryPreference memory_preference;
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bool work_stealing;
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int max_smem_bins; // 0 = unlimited
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};
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struct policy_selector {
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bool sample_is_primitive;
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int sample_size; // sizeof(SampleT)
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int counter_size; // sizeof(CounterT), typically 4
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int sample_size_bytes;
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int num_channels;
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int num_active_channels;
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bool is_even;
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constexpr int t_scale(int nominal_items) const {
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int sample_scale = (sample_size_bytes + 3) / 4;
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int result = nominal_items / num_active_channels / sample_scale;
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return result > 0 ? result : 1;
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}
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constexpr HistogramPolicy operator()(const hardware_capability& hw) const {
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// === SM100 tunings (BI-V100 adapted) ===
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if (num_channels == 1 && num_active_channels == 1 &&
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counter_size == 4 && sample_is_primitive && sample_size == 1) {
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if (is_even) {
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// ipt_12.tpb_928.rle_0.ws_0.mem_1.ld_2.laid_0.vec_2
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// BI-V100: tpb=928 may exceed 16 SM occupancy, but keep for throughput
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// SMEM: 928*12*1 + 2048*4 = 19264 → safe
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return {928, 12, 1<<2, BLOCK_LOAD_DIRECT, LOAD_CA,
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false, HistogramMemoryPreference::SMEM, false, 2048};
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} else {
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// ipt_12.tpb_448.rle_0.ws_0.mem_1.ld_1.laid_0.vec_2
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return {448, 12, 1<<2, BLOCK_LOAD_DIRECT, LOAD_LDG,
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false, HistogramMemoryPreference::SMEM, false, 2048};
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}
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}
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// === SM90 tunings ===
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if (num_channels == 1 && num_active_channels == 1 &&
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counter_size == 4 && sample_is_primitive) {
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if (sample_size == 1) {
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return {768, 12, 1<<2, BLOCK_LOAD_DIRECT, LOAD_LDG,
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false, HistogramMemoryPreference::SMEM, false, 2048};
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}
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if (sample_size == 2) {
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return {960, 10, 1<<2, BLOCK_LOAD_DIRECT, LOAD_DEFAULT,
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true, HistogramMemoryPreference::SMEM, false, 2048};
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}
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}
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// === Default (SM50+) ===
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return {384, t_scale(16), 4, BLOCK_LOAD_DIRECT, LOAD_LDG,
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true, HistogramMemoryPreference::SMEM, false, 0};
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}
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};
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} // namespace muh::tuning::histogram
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