56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
83 lines
3.1 KiB
Plaintext
83 lines
3.1 KiB
Plaintext
// SPDX-FileCopyrightText: Copyright (c) 2011, Duane Merrill. All rights reserved.
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// SPDX-FileCopyrightText: Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved.
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// SPDX-License-Identifier: BSD-3
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/**
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* \file
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* cub::GridMappingStrategy enumerates alternative strategies for mapping constant-sized tiles of device-wide data onto
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* a grid of CUDA thread blocks.
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*/
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#pragma once
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#include <cub/config.cuh>
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#if defined(_CCCL_IMPLICIT_SYSTEM_HEADER_GCC)
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# pragma GCC system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_CLANG)
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# pragma clang system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_MSVC)
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# pragma system_header
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#endif // no system header
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CUB_NAMESPACE_BEGIN
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/******************************************************************************
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* Mapping policies
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*****************************************************************************/
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/**
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* \brief cub::GridMappingStrategy enumerates alternative strategies for mapping constant-sized tiles of device-wide
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* data onto a grid of CUDA thread blocks.
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*/
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enum GridMappingStrategy
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{
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/**
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* \brief An a "raking" access pattern in which each thread block is
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* assigned a consecutive sequence of input tiles
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*
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* \par Overview
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* The input is evenly partitioned into \p p segments, where \p p is
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* constant and corresponds loosely to the number of thread blocks that may
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* actively reside on the target device. Each segment is comprised of
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* consecutive tiles, where a tile is a small, constant-sized unit of input
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* to be processed to completion before the thread block terminates or
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* obtains more work. The kernel invokes \p p thread blocks, each
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* of which iteratively consumes a segment of <em>n</em>/<em>p</em> elements
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* in tile-size increments.
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*/
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GRID_MAPPING_RAKE,
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/**
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* \brief An a "strip mining" access pattern in which the input tiles assigned
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* to each thread block are separated by a stride equal to the the extent of
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* the grid.
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*
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* \par Overview
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* The input is evenly partitioned into \p p sets, where \p p is
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* constant and corresponds loosely to the number of thread blocks that may
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* actively reside on the target device. Each set is comprised of
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* data tiles separated by stride \p tiles, where a tile is a small,
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* constant-sized unit of input to be processed to completion before the
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* thread block terminates or obtains more work. The kernel invokes \p p
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* thread blocks, each of which iteratively consumes a segment of
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* <em>n</em>/<em>p</em> elements in tile-size increments.
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*/
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GRID_MAPPING_STRIP_MINE,
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/**
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* \brief A dynamic "queue-based" strategy for assigning input tiles to thread blocks.
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*
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* \par Overview
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* The input is treated as a queue to be dynamically consumed by a grid of
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* thread blocks. Work is atomically dequeued in tiles, where a tile is a
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* unit of input to be processed to completion before the thread block
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* terminates or obtains more work. The grid size \p p is constant,
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* loosely corresponding to the number of thread blocks that may actively
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* reside on the target device.
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*/
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GRID_MAPPING_DYNAMIC,
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};
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CUB_NAMESPACE_END
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