Commit Graph

3 Commits

Author SHA1 Message Date
muh
86d6c9f6c2 [critical/config] baseline.muh: sync from computility-run.yaml — was stale
FOUND: baseline.muh had completely different values from computility-run.yaml
(the actual deployment config). This means gen_yaml.py would produce a WRONG
computility-run.yaml if someone regenerated it from baseline.muh.

Key differences synced:
  max_model_len:        100000 → 256000  (competition allows 256K context)
  gpu_memory_utilization: 0.9 → 0.95    (squeeze more KV cache)
  max_num_seqs:              1 → 2       (allow 2 concurrent sequences)
  max_num_batched_tokens: 8192 → 4096   (smaller prefill chunks)
  enforce_eager:        (missing) → true (BI-V100 doesn't support CUDA graph)
  dtype:                (missing) → half
  VLLM_ATTENTION_BACKEND: (missing) → XFORMERS

CRITICAL DISCOVERY: CoreX native libraries revealed:
  libcorex_fa2.so — Iluvatar FlashAttention2 (NOT generic xformers)
  libcorex_gdn.so — CoreX GDN ops
  libcorex_moe.so — CoreX MoE GEMM kernel
These are the REAL performance-critical kernels, loaded via VLLM_COREX_*
env vars. The Triton flash_attention.py is a FALLBACK, not the primary path.

CCCL insight: thread_store.cuh shows PTX cache modifiers (st.cg, st.cs)
may be ignored on non-NVIDIA hardware. This explains why LOAD_DEFAULT
outperforms LOAD_LDG on BI-V100 — CoreX has a different cache hierarchy.
2026-08-06 06:12:51 +00:00
dylanyunlon
57e222b99d [MUH] Fix three-layer disconnect — C++ headers are now the single source of truth
Problems fixed:
  1. gen_patch.py was reading .muh YAML (all nulls) instead of C++ headers.
     Now it parses bi100_* structs directly from tuning_*.cuh via regex,
     extracts constexpr values, and maps them to vllm injection points.
     Verified: 11 patches generated from 6 algorithms.

  2. C++ headers had no build system or tests.
     Added CMakeLists.txt (header-only library target) and compile_test.cpp.
     Verified: g++ -std=c++17 compiles all headers, 17/17 runtime checks pass.
     Also added cuda_compile_test.cu for when nvcc is available.

  3. baseline.muh had a tuning section full of nulls duplicating C++ values.
     Stripped to vllm launch config only. Tuning values live exclusively
     in muh/include/muh/tuning/tuning_*.cuh bi100_* structs.

  4. Fixed constexpr goto in tuning_scan.cuh (C++17 doesn't allow goto in
     constexpr; replaced with early-return + default: break pattern).

Data flow is now:
  tuning_*.cuh (bi100_* constexpr) ──→ gen_patch.py ──→ vllm patches
  baseline.muh (launch config)     ──→ gen_yaml.py  ──→ computility-run.yaml
  compile_test.cpp                 ──→ g++/nvcc     ──→ verify values are real
2026-07-30 14:12:33 +00:00
dylanyunlon
9b21a13119 [MUH] Bootstrap muh toolchain — extract/parse/gen_yaml/gen_patch + baseline.muh
Pipeline:
  1. extract.py: Parses all 26 CCCL tuning_*.cuh → 26 YAML schemas in muh/schema/
  2. parse.py: .muh file parser with extends-inheritance + schema validation
  3. gen_yaml.py: .muh → computility-run.yaml (verified: matches competition reference)
  4. gen_patch.py: .muh → vllm kernel unified diff patches (6 algorithm mappings)
  5. baseline.muh: Competition reference config, all tuning values pending BI-V100 benchmarks

Schemas extracted:
  26 algorithms, 8-19 params each, SM75/80/90/100 reference tunings
  Priority mapping: reduce→attention, topk→sampling, scan→paged_attention,
  transform→activations, batch_memcpy→KV_cache, for→RoPE

Tested: extract→parse→validate→gen_yaml→gen_patch full pipeline passes
2026-07-30 10:39:06 +00:00