[MUH] Delete 20 dead-code batch-generated tuning headers
Audit results: - 20/20 files had IDENTICAL if-branch and fallback (dead code) - 787 lines total, 5% coverage of 15116 lines in CCCL originals - No type specializations, no offset_size branches, no benchmark data - 0 of 20 algorithms appear on vllm's Qwen3.6 inference hot path The 6 headers that remain (reduce, topk, scan, transform, batch_memcpy, for) are the only algorithms that execute during vllm decode/prefill/cache operations. These 6 have real type specializations and CCCL SM100 reference values. CCCL has 26 algorithms because it's a general-purpose library. muh targets one workload: Qwen3.6-35B-A3B on 4× BI-V100. Covering algorithms that don't execute is worse than not covering them — it creates the illusion of completeness.
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// muh/include/muh/tuning/tuning_merge.cuh — BI-V100 merge tuning
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//
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// Mirrors: cccl_upstream/cub/cub/device/dispatch/tuning/tuning_merge.cuh
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// vllm impact: sequence merge in batch scheduling
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// Competition weight: Output TPS × 16.796
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#pragma once
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#include "muh/hardware.cuh"
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#include "muh/tuning/common.cuh"
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namespace muh::tuning::merge {
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struct MergePolicy {
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int threads_per_block;
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int items_per_thread;
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CacheLoadModifier load_modifier;
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};
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struct bi100_default {
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static constexpr int threads = 512;
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static constexpr int items = 15;
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static constexpr int load_mod = LOAD_DEFAULT;
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};
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struct policy_selector {
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int key_size;
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int value_size;
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constexpr MergePolicy operator()(const hardware_capability& hw) const {
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if (hw.at_least(hardware_capability::vendor_t::iluvatar, 100)) {
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return {bi100_default::threads, bi100_default::items, LOAD_DEFAULT};
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}
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// Fallback
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return {bi100_default::threads, bi100_default::items, LOAD_DEFAULT};
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}
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};
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} // namespace muh::tuning::merge
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