[INFRA] Import NVIDIA/CCCL upstream as optimization reference library

CCCL (CUDA C++ Core Libraries) provides:
- CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk)
- Thrust: high-level parallel algorithms (transform_reduce, sort, scan)
- libcudacxx: CUDA C++ standard library (atomics, barriers, memory)
- cudax: experimental features (memory resources, allocators)
- Tuning policies: per-SM hardware-specific algorithm parameters

Competition optimization vectors mapped to CCCL:
- Output TPS (83% weight): warp_reduce, block_reduce, device_topk
- Input TPS (14% weight): device_scan, block_load, prefetch
- Cache TPS (3% weight): prefix caching strategy patterns
- Memory (0.9 util): pooled/cached/buddy allocators

Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only)
License: Apache-2.0

cccl_upstream/cub/benchmarks/bench/find_bound/find_bound_common.cuh

@@ -0,0 +1,58 @@
+// SPDX-FileCopyrightText: Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+#pragma once
+
+//! Shared setup for `cub::DeviceFind` bounds benchmarks. Data layout and
+//! generation mirror `thrust/benchmarks/bench/vectorized_search/{lower,upper}_bound.cu`
+//! (Elements pow2 16..28 step 4, int8..int64, NeedlesRatio {1, 25, 50}).
+
+#include <thrust/device_vector.h>
+#include <thrust/sort.h>
+
+#include <cstddef>
+
+#include <nvbench_helper.cuh>
+
+template <typename T>
+struct bounds_bench_data
+{
+  thrust::device_vector<T> data{};
+  thrust::device_vector<std::ptrdiff_t> result{};
+  std::size_t elements{};
+  std::size_t needles{};
+
+  explicit bounds_bench_data(nvbench::state& state)
+  {
+    elements                 = static_cast<std::size_t>(state.get_int64("Elements{io}"));
+    const auto needles_ratio = static_cast<std::size_t>(state.get_int64("NeedlesRatio"));
+    needles                  = needles_ratio * static_cast<std::size_t>(static_cast<double>(elements) / 100.0);
+
+    data   = generate(elements + needles);
+    result = thrust::device_vector<std::ptrdiff_t>(needles, thrust::no_init);
+
+    thrust::sort(data.begin(),
+                 data.begin() + static_cast<typename thrust::device_vector<T>::difference_type>(elements));
+  }
+
+  void sort_needles()
+  {
+    thrust::sort(data.begin() + static_cast<typename thrust::device_vector<T>::difference_type>(elements), data.end());
+  }
+
+  T* range_ptr()
+  {
+    return thrust::raw_pointer_cast(data.data());
+  }
+
+  T* values_ptr()
+  {
+    return thrust::raw_pointer_cast(
+      data.data() + static_cast<typename thrust::device_vector<T>::difference_type>(elements));
+  }
+
+  std::ptrdiff_t* output_ptr()
+  {
+    return thrust::raw_pointer_cast(result.data());
+  }
+};

cccl_upstream/cub/benchmarks/bench/find_bound/lower_bound.cu

@@ -0,0 +1,43 @@
+// SPDX-FileCopyrightText: Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+//! `cub::DeviceFind::LowerBound`: haystack sorted, needles unsorted (Thrust vectorized_search parity).
+
+#include <cub/device/device_find.cuh>
+
+#include <cstdint>
+
+#include <nvbench_helper.cuh>
+
+#include "find_bound_common.cuh"
+
+template <typename T>
+void basic(nvbench::state& state, nvbench::type_list<T>)
+{
+  bounds_bench_data<T> s(state);
+
+  state.add_element_count(s.needles);
+  state.add_global_memory_reads<T>(s.elements + s.needles);
+  state.add_global_memory_writes<std::ptrdiff_t>(s.needles);
+
+  caching_allocator_t alloc;
+  state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch, [&](nvbench::launch& launch) {
+    const auto env = cub_bench_env(alloc, launch);
+    _CCCL_TRY_CUDA_API(
+      cub::DeviceFind::LowerBound,
+      "LowerBound failed",
+      s.range_ptr(),
+      static_cast<std::int64_t>(s.elements),
+      s.values_ptr(),
+      static_cast<std::int64_t>(s.needles),
+      s.output_ptr(),
+      less_t{},
+      env);
+  });
+}
+
+NVBENCH_BENCH_TYPES(basic, NVBENCH_TYPE_AXES(integral_types))
+  .set_name("base")
+  .set_type_axes_names({"T{ct}"})
+  .add_int64_power_of_two_axis("Elements{io}", nvbench::range(16, 28, 4))
+  .add_int64_axis("NeedlesRatio", {1, 25, 50});

cccl_upstream/cub/benchmarks/bench/find_bound/lower_bound_sorted_values.cu

@@ -0,0 +1,44 @@
+// SPDX-FileCopyrightText: Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+//! `cub::DeviceFind::LowerBoundSortedValues`: haystack and values (needles) sorted.
+
+#include <cub/device/device_find.cuh>
+
+#include <cstdint>
+
+#include <nvbench_helper.cuh>
+
+#include "find_bound_common.cuh"
+
+template <typename T>
+void basic(nvbench::state& state, nvbench::type_list<T>)
+{
+  bounds_bench_data<T> s(state);
+  s.sort_needles();
+
+  state.add_element_count(s.needles);
+  state.add_global_memory_reads<T>(s.elements + s.needles);
+  state.add_global_memory_writes<std::ptrdiff_t>(s.needles);
+
+  caching_allocator_t alloc;
+  state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch, [&](nvbench::launch& launch) {
+    const auto env = cub_bench_env(alloc, launch);
+    _CCCL_TRY_CUDA_API(
+      cub::DeviceFind::LowerBoundSortedValues,
+      "LowerBoundSortedValues failed",
+      s.range_ptr(),
+      static_cast<std::int64_t>(s.elements),
+      s.values_ptr(),
+      static_cast<std::int64_t>(s.needles),
+      s.output_ptr(),
+      less_t{},
+      env);
+  });
+}
+
+NVBENCH_BENCH_TYPES(basic, NVBENCH_TYPE_AXES(integral_types))
+  .set_name("base")
+  .set_type_axes_names({"T{ct}"})
+  .add_int64_power_of_two_axis("Elements{io}", nvbench::range(16, 28, 4))
+  .add_int64_axis("NeedlesRatio", {1, 25, 50});

cccl_upstream/cub/benchmarks/bench/find_bound/upper_bound.cu

@@ -0,0 +1,43 @@
+// SPDX-FileCopyrightText: Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+//! `cub::DeviceFind::UpperBound`: haystack sorted, needles unsorted (Thrust vectorized_search parity).
+
+#include <cub/device/device_find.cuh>
+
+#include <cstdint>
+
+#include <nvbench_helper.cuh>
+
+#include "find_bound_common.cuh"
+
+template <typename T>
+void basic(nvbench::state& state, nvbench::type_list<T>)
+{
+  bounds_bench_data<T> s(state);
+
+  state.add_element_count(s.needles);
+  state.add_global_memory_reads<T>(s.elements + s.needles);
+  state.add_global_memory_writes<std::ptrdiff_t>(s.needles);
+
+  caching_allocator_t alloc;
+  state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch, [&](nvbench::launch& launch) {
+    const auto env = cub_bench_env(alloc, launch);
+    _CCCL_TRY_CUDA_API(
+      cub::DeviceFind::UpperBound,
+      "UpperBound failed",
+      s.range_ptr(),
+      static_cast<std::int64_t>(s.elements),
+      s.values_ptr(),
+      static_cast<std::int64_t>(s.needles),
+      s.output_ptr(),
+      less_t{},
+      env);
+  });
+}
+
+NVBENCH_BENCH_TYPES(basic, NVBENCH_TYPE_AXES(integral_types))
+  .set_name("base")
+  .set_type_axes_names({"T{ct}"})
+  .add_int64_power_of_two_axis("Elements{io}", nvbench::range(16, 28, 4))
+  .add_int64_axis("NeedlesRatio", {1, 25, 50});

cccl_upstream/cub/benchmarks/bench/find_bound/upper_bound_sorted_values.cu

@@ -0,0 +1,44 @@
+// SPDX-FileCopyrightText: Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+//! `cub::DeviceFind::UpperBoundSortedValues`: haystack and values (needles) sorted.
+
+#include <cub/device/device_find.cuh>
+
+#include <cstdint>
+
+#include <nvbench_helper.cuh>
+
+#include "find_bound_common.cuh"
+
+template <typename T>
+void basic(nvbench::state& state, nvbench::type_list<T>)
+{
+  bounds_bench_data<T> s(state);
+  s.sort_needles();
+
+  state.add_element_count(s.needles);
+  state.add_global_memory_reads<T>(s.elements + s.needles);
+  state.add_global_memory_writes<std::ptrdiff_t>(s.needles);
+
+  caching_allocator_t alloc;
+  state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch, [&](nvbench::launch& launch) {
+    const auto env = cub_bench_env(alloc, launch);
+    _CCCL_TRY_CUDA_API(
+      cub::DeviceFind::UpperBoundSortedValues,
+      "UpperBoundSortedValues failed",
+      s.range_ptr(),
+      static_cast<std::int64_t>(s.elements),
+      s.values_ptr(),
+      static_cast<std::int64_t>(s.needles),
+      s.output_ptr(),
+      less_t{},
+      env);
+  });
+}
+
+NVBENCH_BENCH_TYPES(basic, NVBENCH_TYPE_AXES(integral_types))
+  .set_name("base")
+  .set_type_axes_names({"T{ct}"})
+  .add_int64_power_of_two_axis("Elements{io}", nvbench::range(16, 28, 4))
+  .add_int64_axis("NeedlesRatio", {1, 25, 50});