project_6_89d52222/muh/schema/merge.yaml

# muh schema for merge
# Auto-extracted from cub/cub/device/dispatch/tuning/tuning_merge.cuh
# Generated by muh/extract.py

algorithm: merge
source: cub/cub/device/dispatch/tuning/tuning_merge.cuh
parameters:
  threads_per_block:
    type: int
    range:
      - 32
      - 1024
    step: 32
  items_per_thread:
    type: int
    range:
      - 1
      - 32
    step: 1
  load_modifier:
    type: enum
    values:
      - LOAD_DEFAULT
      - LOAD_CA
      - LOAD_CG
      - LOAD_CS
      - LOAD_CV
      - LOAD_LDG
  store_algorithm:
    type: enum
    values:
      - BLOCK_STORE_DIRECT
      - BLOCK_STORE_WARP_TRANSPOSE
      - BLOCK_STORE_WARP_TRANSPOSE_TIMESLICED
      - BLOCK_STORE_STRIPED
  key_size:
    type: int
    range:
      - 1
      - 1024
    step: 1
    note: unknown_range
  key_align:
    type: int
    range:
      - 1
      - 1024
    step: 1
    note: unknown_range
  key_is_trivially_relocatable:
    type: int
    range:
      - 1
      - 1024
    step: 1
    note: unknown_range
  value_size:
    type: int
    range:
      - 1
      - 1024
    step: 1
    note: unknown_range
  value_align:
    type: int
    range:
      - 1
      - 1024
    step: 1
    note: unknown_range
  value_is_trivially_relocatable:
    type: int
    range:
      - 1
      - 1024
    step: 1
    note: unknown_range
  offset_size:
    type: int
    range:
      - 1
      - 1024
    step: 1
    note: unknown_range
bi_v100:
  status: pending_benchmark
  note: Run muh benchmark on Iluvatar BI-V100 to fill these values
  threads_per_block: TBD
  items_per_thread: TBD
[MUH] Bootstrap muh toolchain — extract/parse/gen_yaml/gen_patch + baseline.muh Pipeline: 1. extract.py: Parses all 26 CCCL tuning_*.cuh → 26 YAML schemas in muh/schema/ 2. parse.py: .muh file parser with extends-inheritance + schema validation 3. gen_yaml.py: .muh → computility-run.yaml (verified: matches competition reference) 4. gen_patch.py: .muh → vllm kernel unified diff patches (6 algorithm mappings) 5. baseline.muh: Competition reference config, all tuning values pending BI-V100 benchmarks Schemas extracted: 26 algorithms, 8-19 params each, SM75/80/90/100 reference tunings Priority mapping: reduce→attention, topk→sampling, scan→paged_attention, transform→activations, batch_memcpy→KV_cache, for→RoPE Tested: extract→parse→validate→gen_yaml→gen_patch full pipeline passes 2026-07-30 10:39:06 +00:00			`# muh schema for merge`
			`# Auto-extracted from cub/cub/device/dispatch/tuning/tuning_merge.cuh`
			`# Generated by muh/extract.py`

			`algorithm: merge`
			`source: cub/cub/device/dispatch/tuning/tuning_merge.cuh`
			`parameters:`
			`threads_per_block:`
			`type: int`
			`range:`
			`- 32`
			`- 1024`
			`step: 32`
			`items_per_thread:`
			`type: int`
			`range:`
			`- 1`
			`- 32`
			`step: 1`
			`load_modifier:`
			`type: enum`
			`values:`
			`- LOAD_DEFAULT`
			`- LOAD_CA`
			`- LOAD_CG`
			`- LOAD_CS`
			`- LOAD_CV`
			`- LOAD_LDG`
			`store_algorithm:`
			`type: enum`
			`values:`
			`- BLOCK_STORE_DIRECT`
			`- BLOCK_STORE_WARP_TRANSPOSE`
			`- BLOCK_STORE_WARP_TRANSPOSE_TIMESLICED`
			`- BLOCK_STORE_STRIPED`
			`key_size:`
			`type: int`
			`range:`
			`- 1`
			`- 1024`
			`step: 1`
			`note: unknown_range`
			`key_align:`
			`type: int`
			`range:`
			`- 1`
			`- 1024`
			`step: 1`
			`note: unknown_range`
			`key_is_trivially_relocatable:`
			`type: int`
			`range:`
			`- 1`
			`- 1024`
			`step: 1`
			`note: unknown_range`
			`value_size:`
			`type: int`
			`range:`
			`- 1`
			`- 1024`
			`step: 1`
			`note: unknown_range`
			`value_align:`
			`type: int`
			`range:`
			`- 1`
			`- 1024`
			`step: 1`
			`note: unknown_range`
			`value_is_trivially_relocatable:`
			`type: int`
			`range:`
			`- 1`
			`- 1024`
			`step: 1`
			`note: unknown_range`
			`offset_size:`
			`type: int`
			`range:`
			`- 1`
			`- 1024`
			`step: 1`
			`note: unknown_range`
			`bi_v100:`
			`status: pending_benchmark`
			`note: Run muh benchmark on Iluvatar BI-V100 to fill these values`
			`threads_per_block: TBD`
			`items_per_thread: TBD`