project_6

Files

dylan e8f0948fe1 feat: ix_ops integration layer — wire ix_full_bridge.so into vllm hot path

Architecture (CCCL dispatch pattern):
  base_image ixformer::infer → ix_full_bridge.so → ix_ops.py → vllm patches

New files:
  ex_engine/python/ix_ops.py          — Python API for all 14 ixformer::infer ops
  ex_engine/python/patch_vllm_ops.py  — monkey-patch vllm GemmaRMSNorm, SiluAndMul
  ex_engine/deploy_ix_bridge.sh       — build-time deployment script

Modified:
  qwen3_6_scripts/patch_ops.sh        — integrated ix_bridge deployment + startup hook

Call chain: DecoderLayer.forward → GemmaRMSNorm → ix_ops.fused_add_rms_norm
            → ixformer::infer::residual_rms_norm (fused C++ kernel)

2026-08-15 06:15:17 +00:00

csrc

fix: use F.silu in test script for old corex torch

2026-08-15 05:22:31 +00:00

fla_kernels

feat: import CUDA kernels from xllm/CCCL/FLA upstream repos

2026-08-14 07:48:52 +00:00

include

fix(CRITICAL): engine death on image request + stop overwriting base corex modules

2026-08-10 09:12:05 +00:00

python

feat: ix_ops integration layer — wire ix_full_bridge.so into vllm hot path