project_6 c17e517e9e [docs] CCCL transform architecture — vectorized vs prefetch, bytes_in_flight scope ...

From reading cccl_upstream/cub/cub/device/dispatch/tuning/tuning_transform.cuh:

1. BI-V100 can only use prefetch and vectorized algorithms.
   ldgsts (SM80+ cp.async) and ublkcp (SM90+ bulk copy) are NVIDIA-only.

2. bytes_in_flight only affects the PREFETCH path. For vllm's
   contiguous fp16 element-wise ops (RMSNorm/SiLU/RoPE), the
   VECTORIZED path is selected, where items_per_thread is fixed
   at compile time, not derived from bytes_in_flight.

3. CCCL's cc_to_min_bytes_in_flight: B200=64KB, H100=48KB, A100=16KB,
   V100=12KB. Our 64KB matches B200 level (56 GB/s/SM ≈ B200).

4. Bench result alg=1 confirms vectorized path is used on BI-V100.
   The vectorized default {256, 8, 4} matches the benchmark winner.

Source: cccl_upstream/cub/cub/device/dispatch/tuning/tuning_transform.cuh

2026-08-05 03:36:00 +00:00

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server_recon

docs: document Qwen3.6-35B-A3B bootstrap failure and architecture analysis

2026-08-01 13:16:01 +00:00

CCCL_REDUCE_ARCHITECTURE_NOTES.md

[docs] CCCL transform architecture — vectorized vs prefetch, bytes_in_flight scope

2026-08-05 03:36:00 +00:00

CCCL_TO_TRITON_METHODOLOGY.md

docs: CCCL → Triton methodology transfer — parameter search translation table

2026-08-03 04:37:23 +00:00

paged_attention_kernel_architecture.md

[ARCH] CCCL-derived paged attention kernel architecture + Triton rewrite

2026-07-31 04:13:07 +00:00

SPECIALIZATION_ANALYSIS.md

[muh] kernel_map: full vllm→CCCL mapping with SMEM overflow detection

2026-07-31 11:13:33 +00:00