9ca33cf4d5
Sources (all CUDA 10.2 compatible, no CUTLASS/Triton dependency): - leimao/CUDA-GEMM-Optimization: v00-v07, fp16 WMMA variant, double buffered - siboehm/SGEMM_CUDA: kernel 1-12, warp tiling + double buffering - wangzyon/NVIDIA_SGEMM_PRACTICE: kernel 1-7 - edtallison/sgemm-cuda: kernel 1-12 (reimplementation with notes) Key porting issue: ALL kernels hardcode WARPSIZE=32. BI-V100 has warp_size=64. Need to: 1. Replace all 32U / WARPSIZE constants with 64 2. Adjust warp subtile decomposition (WMITER, WNITER, WSUBM, WSUBN) 3. Adjust shared memory bank conflict avoidance (may have different bank count) 4. Test __shfl_down_sync with mask=0xFFFFFFFFFFFFFFFF (64-bit)
Upstream Reference: Deep-Spark xllm + vllm (FULL TREE)
Source repos (cloned 2026-08-09, Apache 2.0):
Deep-Spark/xllm— Iluvatar official C++ LLM inference engine (1470 files)Deep-Spark/vllm— Iluvatar official vllm fork (703 files, csrc + model layer)
What's here
xllm/ (complete source minus git/binaries/submodules)
天数智芯官方下一代推理引擎，C++ 原生，多平台(CUDA/ILU/MLU/NPU)。 包含 kernels → layers → models → runtime → scheduler → api_service 完整栈。
Key subtrees:
xllm/core/kernels/ilu/— ixformer API wrappers (ixformer.h是金矿)xllm/core/kernels/cuda/moe/— MoE CUDA kernels (topk_softmax, fused_topk)xllm/core/kernels/cuda/— activation, norm, rope, attention CUDA kernelsxllm/core/layers/ilu/— Iluvatar FusedMoE完整pipelinexllm/core/layers/npu_torch/— GatedDeltaNet C++ implementationxllm/models/llm/qwen3_5.h— Qwen3.5 model definitionxllm/compiler/tilelang/— GDN kernel code generation
ds_vllm/ (csrc + model layers + fused_moe)
天数智芯官方vllm fork，Python + CUDA torch extension。
csrc/— ALL CUDA source (attention, moe, quantization, cache)csrc/libtorch_stable/moe/topk_softmax_kernels.cu— vllm topk_softmaxvllm/_custom_ops.py— Python → torch.ops._moe_C bridgevllm/model_executor/models/qwen3_5.py— ds_vllm的qwen3_5实现vllm/model_executor/layers/fused_moe/— vllm FusedMoE Python layer