56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
76 lines
2.1 KiB
Plaintext
76 lines
2.1 KiB
Plaintext
//===----------------------------------------------------------------------===//
|
|
//
|
|
// Part of libcu++, the C++ Standard Library for your entire system,
|
|
// under the Apache License v2.0 with LLVM Exceptions.
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
|
// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include <thrust/device_vector.h>
|
|
#include <thrust/execution_policy.h>
|
|
|
|
#include <cuda/memory_pool>
|
|
#include <cuda/std/execution>
|
|
#include <cuda/stream>
|
|
|
|
#include <nvbench_helper.cuh>
|
|
|
|
template <class InT, class OutT>
|
|
struct fib_t
|
|
{
|
|
__device__ OutT operator()(InT n)
|
|
{
|
|
OutT t1 = 0;
|
|
OutT t2 = 1;
|
|
|
|
if (n <= 1)
|
|
{
|
|
return t1;
|
|
}
|
|
else if (n == 2)
|
|
{
|
|
return t2;
|
|
}
|
|
for (InT i = 3; i <= n; ++i)
|
|
{
|
|
const auto next = t1 + t2;
|
|
t1 = t2;
|
|
t2 = next;
|
|
}
|
|
|
|
return t2;
|
|
}
|
|
};
|
|
|
|
template <typename T>
|
|
static void fib(nvbench::state& state, nvbench::type_list<T>)
|
|
{
|
|
const auto elements = static_cast<std::size_t>(state.get_int64("Elements"));
|
|
|
|
thrust::device_vector<T> input = generate(elements, bit_entropy::_1_000, T{0}, T{42});
|
|
thrust::device_vector<T> output(elements);
|
|
|
|
state.add_element_count(elements);
|
|
state.add_global_memory_reads<T>(elements);
|
|
state.add_global_memory_writes<nvbench::uint32_t>(elements);
|
|
|
|
fib_t<T, nvbench::uint32_t> op{};
|
|
|
|
caching_allocator_t alloc{};
|
|
|
|
state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch | nvbench::exec_tag::sync,
|
|
[&](nvbench::launch& launch) {
|
|
do_not_optimize(
|
|
cuda::std::transform(cuda_policy(alloc, launch), input.cbegin(), input.cend(), output.begin(), op));
|
|
});
|
|
}
|
|
|
|
using types = nvbench::type_list<nvbench::uint32_t, nvbench::uint64_t>;
|
|
|
|
NVBENCH_BENCH_TYPES(fib, NVBENCH_TYPE_AXES(types))
|
|
.set_name("fib")
|
|
.set_type_axes_names({"T{ct}"})
|
|
.add_int64_power_of_two_axis("Elements", nvbench::range(16, 28, 4));
|