56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
87 lines
2.1 KiB
Plaintext
87 lines
2.1 KiB
Plaintext
//===----------------------------------------------------------------------===//
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//
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// Part of CUDASTF in CUDA C++ Core Libraries,
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// under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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/**
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* @file
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*
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* @brief Freeze data in read-only fashion
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*
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*/
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#include <cuda/experimental/__stf/graph/graph_ctx.cuh>
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#include <cuda/experimental/__stf/stream/stream_ctx.cuh>
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using namespace cuda::experimental::stf;
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int X0(int i)
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{
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return 17 * i + 45;
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}
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__global__ void mult(slice<int> s, int val)
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{
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int tid = blockIdx.x * blockDim.x + threadIdx.x;
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int nthreads = gridDim.x * blockDim.x;
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for (int i = tid; i < s.size(); i += nthreads)
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{
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s(i) *= val;
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}
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}
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int main()
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{
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stream_ctx ctx;
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cudaStream_t stream = ctx.pick_stream();
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const int N = 16;
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int X[N];
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for (int i = 0; i < N; i++)
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{
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X[i] = X0(i);
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}
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auto lX = ctx.logical_data(X).set_symbol("X");
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auto lY = ctx.logical_data(lX.shape()).set_symbol("Y");
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for (int k = 0; k < 4; k++)
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{
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auto fx = ctx.freeze(lX, access_mode::rw, data_place::current_device());
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_CCCL_ASSERT(fx.get_access_mode() == access_mode::rw, "invalid access mode");
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auto dX = fx.get(data_place::current_device(), stream);
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mult<<<8, 4, 0, stream>>>(dX, 4);
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fx.unfreeze(stream);
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ctx.parallel_for(lX.shape(), lX.read(), lY.write()).set_symbol("Y=X")->*[] __device__(size_t i, auto x, auto y) {
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y(i) = x(i);
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};
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ctx.parallel_for(lX.shape(), lY.rw()).set_symbol("Y+=1")->*[] __device__(size_t i, auto y) {
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y(i) += 1;
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};
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// ctx.host_launch(lX.read(), lY.read())->*[](auto x, auto y) {
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// for (int i = 0; i < x.size(); i++) {
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// EXPECT(x(i) == 2*X0(i) + 4);
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// }
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//
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// for (int i = 0; i < y.size(); i++) {
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// EXPECT(y(i) == 2*X0(i) + 4);
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// }
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// };
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}
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ctx.finalize();
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}
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