56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
120 lines
3.1 KiB
Plaintext
120 lines
3.1 KiB
Plaintext
//===----------------------------------------------------------------------===//
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//
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// Part of CUDASTF in CUDA C++ Core Libraries,
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// under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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/**
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* @file
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*
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* @brief This example illustrates how to use the task construct with grids of
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* places and composite data places
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*/
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#include <cuda/experimental/__places/partitions/tiled_partition.cuh>
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#include <cuda/experimental/__stf/graph/graph_ctx.cuh>
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#include <cuda/experimental/__stf/stream/stream_ctx.cuh>
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using namespace cuda::experimental::stf;
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template <typename T>
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__global__ void axpy(size_t start, size_t cnt, T a, const T* x, T* y)
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{
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int tid = blockIdx.x * blockDim.x + threadIdx.x;
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int nthreads = gridDim.x * blockDim.x;
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for (int ind = tid; ind < cnt; ind += nthreads)
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{
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y[ind + start] += a * x[ind + start];
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}
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}
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double X0(size_t i)
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{
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return sin((double) i);
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}
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double Y0(size_t i)
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{
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return cos((double) i);
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}
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template <typename Ctx>
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void run()
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{
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Ctx ctx;
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const int N = 1024 * 1024 * 32;
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double *X, *Y;
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X = new double[N];
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Y = new double[N];
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SCOPE(exit)
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{
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delete[] X;
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delete[] Y;
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};
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for (size_t ind = 0; ind < N; ind++)
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{
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X[ind] = X0(ind);
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Y[ind] = Y0(ind);
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}
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// std::shared_ptr<execution_grid> all_devs = exec_place::all_devices();
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// use grid [ 0 0 0 0 ] for debugging purpose
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auto all_devs = exec_place::repeat(exec_place::device(0), 4);
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// 512k doubles = 4MB (2 pages)
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// A 1D blocking strategy over all devices with a block size of 32 and a round robin distribution of blocks across
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// devices
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// data_place cdp = data_place(exec_place::all_devices().as_grid().get_grid(),
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// [](dim4 grid_dim, pos4 index_pos) { return pos4((index_pos.x / (512 * 1024ULL)) % grid_dim.x); });
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data_place cdp = data_place::composite(tiled_partition<512 * 1024ULL>(), all_devs);
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auto handle_X = ctx.logical_data(X, {N});
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auto handle_Y = ctx.logical_data(Y, {N});
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double alpha = 3.14;
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/* Compute Y = Y + alpha X */
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auto t = ctx.task(all_devs, handle_X.read(cdp), handle_Y.rw(cdp));
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t->*[&](auto, auto sX, auto sY) {
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size_t grid_size = t.grid_dims().size();
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assert(N % grid_size == 0);
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for (size_t i = 0; i < grid_size; i++)
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{
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auto active = t.activate_place(i);
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axpy<<<16, 128, 0, t.get_stream(i)>>>(i * N / grid_size, N / grid_size, alpha, sX.data_handle(), sY.data_handle());
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}
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};
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/* Check the result on the host */
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ctx.host_launch(handle_X.read(), handle_Y.read())->*[&](auto sX, auto sY) {
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for (size_t ind = 0; ind < N; ind++)
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{
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// Y should be Y0 + alpha X0
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EXPECT(fabs(sY(ind) - (Y0(ind) + alpha * X0(ind))) < 0.0001);
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// X should be X0
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EXPECT(fabs(sX(ind) - X0(ind)) < 0.0001);
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}
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};
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ctx.finalize();
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}
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int main()
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{
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run<stream_ctx>();
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// Disabled until composite data places are implemented with graphs
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// run<graph_ctx>();
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}
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