56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
100 lines
2.7 KiB
Plaintext
100 lines
2.7 KiB
Plaintext
//===----------------------------------------------------------------------===//
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//
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// Part of CUDASTF in CUDA C++ Core Libraries,
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// under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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#include <cuda/experimental/__stf/stream/stream_ctx.cuh>
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using namespace cuda::experimental::stf;
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/*
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* In this example, the user provides streams in which the STF model inserts the proper dependencies
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*/
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static __global__ void cuda_sleep_kernel(long long int clock_cnt)
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{
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long long int start_clock = clock64();
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long long int clock_offset = 0;
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while (clock_offset < clock_cnt)
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{
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clock_offset = clock64() - start_clock;
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}
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}
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void cuda_sleep(double ms, cudaStream_t stream)
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{
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int device;
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cudaGetDevice(&device);
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// cudaDevAttrClockRate: Peak clock frequency in kilohertz;
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int clock_rate;
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cudaDeviceGetAttribute(&clock_rate, cudaDevAttrClockRate, device);
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long long int clock_cnt = (long long int) (ms * clock_rate);
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cuda_sleep_kernel<<<1, 1, 0, stream>>>(clock_cnt);
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}
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int main()
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{
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stream_ctx ctx;
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double vA, vB, vC, vD;
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auto A = ctx.logical_data(make_slice(&vA, 1));
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auto B = ctx.logical_data(make_slice(&vB, 1));
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auto C = ctx.logical_data(make_slice(&vC, 1));
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auto D = ctx.logical_data(make_slice(&vD, 1));
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// We are going to submit kernels with the following data accesses, where
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// K2 and K3 can be executed concurrently, after K1 and been executed, and
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// before K4 is executed.
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// K1(Aw); K2(Ar,Bw); K3(Ar, Cw); K4(Br,Cr,Dw);
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// User-provided streams
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cudaStream_t K1_stream;
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cudaStream_t K2_stream;
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cudaStream_t K3_stream;
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cudaStream_t K4_stream;
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cudaStreamCreate(&K1_stream);
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cudaStreamCreate(&K2_stream);
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cudaStreamCreate(&K3_stream);
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cudaStreamCreate(&K4_stream);
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// Kernel 1 : A(write)
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auto k1 = ctx.task(A.rw());
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k1.set_stream(K1_stream);
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k1.set_symbol("K1");
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k1.start();
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cuda_sleep(500, K1_stream);
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k1.end();
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// Kernel 2 : A(read) B(write)
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auto k2 = ctx.task(A.read(), B.write());
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k2.set_stream(K2_stream);
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k2.set_symbol("K2");
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k2.start();
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cuda_sleep(500, K2_stream);
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k2.end();
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// Kernel 3 : A(read) C(write)
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auto k3 = ctx.task(A.read(), C.write());
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k3.set_stream(K3_stream);
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k3.set_symbol("K3");
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k3.start();
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cuda_sleep(500, K3_stream);
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k3.end();
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// Kernel 4 : B(read) C(read) D(write)
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auto k4 = ctx.task(B.read(), C.read(), D.write());
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k4.set_stream(K4_stream);
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k4.set_symbol("K4");
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k4.start();
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cuda_sleep(500, K4_stream);
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k4.end();
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ctx.finalize();
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}
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