56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
65 lines
2.3 KiB
Plaintext
65 lines
2.3 KiB
Plaintext
// SPDX-FileCopyrightText: Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// %RANGE% TUNE_BIF_BIAS bif -16:16:4
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// for filling, we can only use the prefetch and the vectorized algorithm
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// %RANGE% TUNE_ALGORITHM alg 0:2:1
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// %RANGE% TUNE_THREADS tpb 128:1024:128
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// for TUNE_ALGORITHM == 1 (vectorized), this is the number of vectors per thread, which is similar in spirit
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// %RANGE% TUNE_UNROLL_FACTOR unrl 1:4:1
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// those parameters only apply if TUNE_ALGORITHM == 0 (prefetch)
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// %RANGE% TUNE_ITEMS_PER_THREAD_NO_INPUT ipt 1:32:1
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// those parameters only apply if TUNE_ALGORITHM == 1 (vectorized)
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// %RANGE% TUNE_VEC_SIZE_POW2 vsp2 1:6:1
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#if !TUNE_BASE && TUNE_ALGORITHM != 0 && (TUNE_ITEMS_PER_THREAD_NO_INPUT != 1)
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# error "Non-prefetch algorithms require the no input items per thread to be 1 since they ignore the parameters"
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#endif // !TUNE_BASE && TUNE_ALGORITHM != 1 && (TUNE_VEC_SIZE_POW2 != 1 || TUNE_VECTORS_PER_THREAD != 1)
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#if !TUNE_BASE && TUNE_ALGORITHM != 1 && (TUNE_VEC_SIZE_POW2 != 1)
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# error "Non-vectorized algorithms require vector size to be 1 since they ignore the parameters"
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#endif // !TUNE_BASE && TUNE_ALGORITHM != 1 && (TUNE_VEC_SIZE_POW2 != 1)
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#include "common.h"
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template <typename T>
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struct return_constant
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{
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T value;
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_CCCL_DEVICE auto operator()() const -> T
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{
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return value;
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}
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};
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template <typename T>
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static void fill(nvbench::state& state, nvbench::type_list<T>)
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try
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{
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// A 32-bit offset type or the value 0 or 0xFF... have <1% performance impact
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const auto value = T{42};
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const auto n = state.get_int64("Elements{io}");
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const bool unaligned = state.get_string("Aligned") == "no";
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thrust::device_vector<T> out(n + unaligned);
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state.add_element_count(n);
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state.add_global_memory_reads<T>(0);
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state.add_global_memory_writes<T>(n);
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bench_transform(state, cuda::std::tuple{}, out.begin() + unaligned, n, return_constant<T>{value});
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}
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catch (const std::bad_alloc&)
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{
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state.skip("Skipping: out of memory.");
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}
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NVBENCH_BENCH_TYPES(fill, NVBENCH_TYPE_AXES(integral_types))
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.set_name("fill")
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.set_type_axes_names({"T{ct}"})
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.add_string_axis("Aligned", {"yes", "no"})
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.add_int64_power_of_two_axis("Elements{io}", nvbench::range(16, 32, 4));
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